Added more DEBUG registers, checked and fixed existing structs
in ipa_reg_save
Change-Id: I95add61146e45d1faf8fd1c625cdb34749395f1e
Signed-off-by: Dima Birenbaum <quic_dbirenba@quicinc.com>
Signed-off-by: Ilia Lin <quic_ilial@quicinc.com>
Retrieves debugfs data for both ethernet clients in case of Dual NIC mode.
Change-Id: I62eb6af1dedaa738674979520d393c753c0f0190
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <quic_ilial@quicinc.com>
Supports APIs for rmnet to register for buffer high/low
notification on WAN and WAN_COAL pipes.
Change-Id: I0b8fd7287f5a25a695243d2aaad93bbc8fb505c1
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
IPA client filtering table can reside in SRAM in case there is enough
space. Since SRAM is a limited resource it might also reside in slower
memory (DDR). This new API enables setting an IPA client's filtering
table SRAM priority to high. It also includes an IOCTL that enables
to use the API from user-space.
Moving an IPA client filtering table to SRAM greatly
improves access time to the filtering rules in it and therefore
the entire data path of this client.
Current limitation is this API needs to be called before filter
rules are installed.
Change-Id: I34814369b9c4f6ea535b739aed9a20df8606080b
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <quic_ilial@quicinc.com>
Distribute the non-hashable tables between SRAM and DDR
instead of relocating them completely to the DDR.
The tables priority is set in first come - first served order.
A more sophisticated priority management may be introduced later.
Change-Id: I744cdfa928a780a7567fd8e6d8dc92d2c2cc6fd6
Signed-off-by: Ilia Lin <quic_ilial@quicinc.com>
1) Race condition fix: eogre_enabled set to true too late
relative to ipacm induced ipa3_cfg_ep_metadat ioctl
2) Added more logging when eogre add/del mapping ioctl's arrive
Change-Id: I58c132a8d0b412c3dc8c5e26773fe358fe58df8f
Signed-off-by: Perry Randise <prandise@codeaurora.org>
When order 3 pages are not available, make changes to use
lower order pages to ensure buffers are provided to HW.
Change-Id: I9eea764d678820b0d3f485525310c506ea29c45e
Signed-off-by: Chaitanya Pratapa <cpratapa@quicinc.com>
Make sure to unlock mutex before adding qmi client req to work queue
Change-Id: I6c85017600c797b64063925be6717151ddb5a0c9
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Make changes to add flow control support for rmnet ll xmit path.
Following changes are added:-
1) Provide free descriptors on every xmit call.
2) Trigger a callback when number of free descriptors go above
a configured threshold.
Change-Id: I527b5cc396ed96176d059f3624b1a042ab7e56df
Signed-off-by: Chaitanya Pratapa <cpratapa@codeauora.org>
Adding NTN3 ethernet client type support for spearhead stats.
Change-Id: Iec7ba1fff0a403066c41008965feaac26aa2dcc4
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
While resetting the header rules if it find invalid header ID it
will return before freeting proc header table it was leading to use
after free when accessing the header pointer from proc header table.
Adding changes to NULL terminating header pointer in proc header table
after header table deleted from the list.
Change-Id: If270d855d3907e61368336316161a250053e1e62
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Add support for 2 new seperate MSI interrupts
to pin rmnet_ll and rmnet_ctl processing to seperate
CPUs.
Change-Id: I83977081a72d734622525732a97f8563fb530ade
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Add ep configuration for DL_NLO q6 on IPA HW-5.0 MHI targets
which is enabled by default on Q6 driver. This will keep IPA LNX
flt table index bitmask consistent with IPA Q6 when committing
the rules.
Change-Id: Iec628bd1033c2041a8d53c7bd9af5576637ab379
Buffer size provided from AP side is increased from 64 to 128.
Change-Id: I794dbf9d02bbadfd6a324b5d78bdb2f04b8ea8e9
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Increased the timeout value of ipa3_uc_send_cmd
from 10 to 20 in ipa3_uc_debug_stats_alloc function.
Change-Id: I5be5839c60b84226872a22e8a05bb712e395e62d
Signed-off-by: Jagadeesh Ponduru <jponduru@codeaurora.org>
Add ep configuration for DL_NLO q6 on IPA HW-5.0 targets
which is enabled by default on Q6 driver. This will keep IPA LNX
flt table index bitmask consistent with IPA Q6 when committing
the rules.
Change-Id: I123ed19e0071430e04ff1414f2a5a2d74cd62771
For Q6 endpoints add change to not reset the HOLB timer
value to zero instead of default value. Add change to
enable HOLB twice for IPA 4.x targets.
Change-Id: Ic9596e711b037d24ae25835cb6dd193ec040d723
Signed-off-by: Praveen Kurapati <pkurapat@codeaurora.org>
Signed-off-by: Jagadeesh Ponduru <jponduru@codeaurora.org>
Adding debug and register prints for flow control enable or disable.
Change-Id: Id6a79880340cc3e7503da6add3ce9aaf9d0a991d
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
In some cases GP_INT1 interrupt not receiving even GSI FW send the
interrupt. In those cases cases reading the flow control command return
code to check completion.
Change-Id: I329550ab94af9caac870c6050761d3701f0517cd
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Removing drops stats support for ADPL pipe from Apps
on both LA and LE as now it is taken care by Q6.
Change-Id: If997204145eaa9b4c15133bd238e59ad3e0dfd98
Signed-off-by: Michael Adisumarta <madisuma@codeauroa.org>
Overwrite ep flow control setting workaround for waipio APQ.
Change-Id: I004ab924bd5ae9797f93589fb98982ba1929714d
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
IPA client filtering table can reside in SRAM in case there is enough
space. Since SRAM is a limited resource it might also reside in slower
memory (DDR). This new API enables setting an IPA client's filtering
table SRAM priority to high. It also includes an IOCTL that enables
to use the API from user-space.
Moving an IPA client filtering table to SRAM greatly
improves access time to the filtering rules in it and therefore
the entire data path of this client.
Current limitation is this API needs to be called before filter
rules are installed.
Change-Id: I80986a4c5f570c93e656f745664e275037a32c2c
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Distribute the non-hashable tables between SRAM and DDR
instead of relocating them completely to the DDR.
The tables priority is set in first come - first served order.
A more sophisticated priority management may be introduced later.
Change-Id: I77e5983914d86705c1ec13ab215b4c9416476d0f
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Use macros instead of magic strings for interfaces names.
Change-Id: I908f35725c72d425334beebd55bc0f0532e183ce
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
