msm: ipa3: add DL_NLO q6 pipe for IPA HW-5.0 targets

Add ep configuration for DL_NLO q6 on IPA HW-5.0 targets
which is enabled by default on Q6 driver. This will keep IPA LNX
flt table index bitmask consistent with IPA Q6 when committing
the rules.

Change-Id: I123ed19e0071430e04ff1414f2a5a2d74cd62771

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

@@ -4176,6 +4176,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
 			QMB_MASTER_SELECT_DDR,
 			{ 15, 2, 28, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 },
 			IPA_TX_INSTANCE_NA },
+	[IPA_5_0][IPA_CLIENT_Q6_DL_NLO_LL_DATA_PROD] = {
+			true, IPA_v5_0_GROUP_URLLC,
+			true,
+			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP,
+			QMB_MASTER_SELECT_DDR,
+			{ 5, 8, 28, 32, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 3 },
+			IPA_TX_INSTANCE_UL },
 	[IPA_5_0][IPA_CLIENT_TEST_PROD] = {
 			true, IPA_v5_0_GROUP_UL,
 			true,
@@ -4726,14 +4733,6 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
 			{ 15, 2, 28, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 },
 			IPA_TX_INSTANCE_NA },
 
-	[IPA_5_1][IPA_CLIENT_Q6_DL_NLO_LL_DATA_PROD] = {
-			true, IPA_v5_0_GROUP_URLLC,
-			true,
-			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP,
-			QMB_MASTER_SELECT_DDR,
-			{ 5, 8, 28, 32, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 3 },
-			IPA_TX_INSTANCE_UL },
-
 	[IPA_5_1][IPA_CLIENT_APPS_LAN_CONS] = {
 			true, IPA_v5_0_GROUP_UL,
 			false,