Correcting the string name of UCSC in the register dump.
Change-Id: I2c8976d6d9bf4804ed6454b848c4a3b326b56f54
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
Add support for UCSC block parameters that includes unmult,
IGC/GC modes, CSC coefficients, and clamps.
Change-Id: I3ef4b729e9c973a98d53dc583233bf5e004035fa
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
Add line insertion support for sspp, this is used to support
display with external splitter. Line insertion logic checks
the difference between screen logical height and physical
height. If any difference is observed adds dummy and active
lines on screen.
Change-Id: Ieec322273df000a53fb39e05174c2d67c3c2da81
Signed-off-by: Rajesh kv <quic_kvrajesh@quicinc.com>
Ensure SDE_ERROR error log print function name and line number.
Add a macro DISP_DEV_ERR as a wrapper of dev_err to ensure origin dev_err
will print function name and line number.
This would help with analysis of errors reported with automated testing.
Expected display error log format:
[FUNCTION_NAME:line] ERROR_MESSAGE
Change-Id: I354f45b492059d5ba2bb110d56443fd338add7ad
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
Kalama adds support for uidle fill level scaling to allow
fal10 mode for 90 and above fps use cases.
Pre-Kalama, the fill levels are clamped at 4-bit values supported
by the threshold registers. But to achieve the targeted 50us idle
time on fal10 modes with higher FPS use cases, we need fill levels
higher than 15 (max for 4 bit). The hardware change in Kalama
achieves by using a 5 bit scale factor in combination with the
programmed threshold values.
Change-Id: I638705355c03910a83e7d922b6fe48ab11c120a8
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
This change adds Detail Enhancer LPF blend support from MDSS 9.0.
Support is added for qseed block in both SSPP and Destination Scaler.
Change-Id: Ic8e3732059498a156f51fb93c5fd6638bd731c57
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
The HW support for RGB pipes were removed from MDSS 3.x and cursor pipes
from MDSS 4.x. Remove the support from s/w as well with this change.
Change-Id: Ib5b363234e200ee5c421684cf1904a38a5d90b58
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add support to enable writeback block to use system cache for writing
the output buffer. This is useful in cases where output is routed to
primary source pipes with 2-pass composition. The implementation is
modelled based on existing pipe based cache configuration.
Change-Id: I2b9a96c5b42eb5727d11ca0f337aeeb4e69362c9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change fixes traffic shaper prefill calculations
for prefill count and bytes per clock as per hardware
recommendations in the HPG which are calcualted as below:
ts_ count = ts_end*19200000/fps/(vtotal)
ts_bytes_per_clk = ceil(h_src*v_src*bpp*fps/
19200000*amortized_pref_rate)
Change-Id: Icc2348421a2124daa3b0056f46d7a6a45021381b
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.
Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Align the HW catalog to use common naming amongst the "revision"
and "version" structure members.
Change-Id: Ib6c81aee6cb49208b0699db4a75b4eb9dc79e800
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
This reverts commit 3617430855.
This change will re-enable qseed programming through lutdma.
Change-Id: I57b897088eeccddc63ee010e296b5d4622d27a9f
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Unmult feature is currently using offsets from previous targets.
This leads to unexpected alpha transparency errors on screen.
This change updates the new offsets based on hw version and
retains the original offsets for backward compatibility.
Change-Id: Icdba050371a583f1a20b91a451be3324de12c2cf
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This change ensures that qseed programming to be completed through AHB
path only.
Change-Id: I26270fdf51d1ac8c68c6967b3ee99857be9c801e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Currently the top/bottom pixel extension overfetch value for
component 3 is misprogrammed with left/right value.
This change corrects the programming sequence.
Change-Id: I2e7accb48840a976645c92cb57b48c6663ae20a0
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This change adds DGM, CSC, and VIG gamut to sde debug dump range. It
also removes unused DSPP registers from debug register dump range.
Change-Id: I5a7adfeb4d93429cf84e7396338f2c025d15e800
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.
Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This change creates a helper function for sde_encoder_virt_enable
which is responsible for setting up physical encoders. Similarly, it
creates a helper function for sde_hw_sspp_setup_format which is
responsible for writing to the static control register based on ubwc
version.
Change-Id: I106f1f2524398daf7285a931971099735ee8dd4f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.
Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change adds support for error checking ubwc and meta error status
based off whether REC0 or RECT1 is used.
Change-Id: I7c39755da99a9d6c0d02b4ef16fa93b8ec7458a9
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change replaces kzfree with kfree as kzfree has been
renamed.
While moving to the latest 5.10 tip, additional small changes
were required to resolve compilation issues:
set_dma_ops has moved from dma-mapping to dma-map-ops header.
This change includes the new header file required.
drm_panel_add returns void, this change removes the expected
return value check.
drm_prime_pages_to_sg takes an additional parameter. This change
passes in the drm_device pointer the function is looking for.
Remove an unused variable in sde_crtc vblank function.
Change-Id: I47c085c0cb64432873c2e750ae64cbdc2b5340da
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Current SDE driver allows staging of rect1 only configuration. When a
real plane is disabled sspp multi rect configuration is not updated.
This can lead to iommu faults and ping pong timeouts as framebuffer of
disabled plane is unmapped. This change fixes it by updating multi rect
config accordingly when a plane is disabled.
Change-Id: I67ae45ad0e607184c7fc49f4b220220ba1d8a2ae
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
QSEED scalar block HW revision is constant for a given MDSS revision.
Both SSPP and DS HW files invoke this API to read the revision register
at various points of time. Expose this revision information through
DT binding and maintain in the catalog to avoid repeated register
reads.
Change-Id: I95c0a5242cfda0aaa4ec5c2ff5c7cc0bed191b59
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.
Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
A new LUTDMA opcode is added to LUTDMA V2 to speed up certain LUT
programming. This change updates the SSPP Gamut LUT programming using
the new opcode and new LUT BUS.
Change-Id: I8b88483dc3acbfcdbd6f441bc2105f4368fa42bb
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Add support for enabling pre-downscale block to increase the
maximum downscale capability for true inline rotation use cases.
Change-Id: Ifa544bb0ae69439abef4bd427134290090fe7230
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Remove the version checks used to populate some mixer and VBIF
ops, and check when constant color should be disabled in SSPP.
These are replaced with feature bits set by the catalog.
Change-Id: I2f8ffe6ebfe3e61c44588589f55ede7cba74e841
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Attempts by virtual planes to set IGC and 3D LUT values are unsupported
and will result in LUTDMA hangs. Update virtual DRM planes capabilities
to disallow these features and make any attempts to set them a NOP.
Change-Id: I50eee7e981208ba53dfae833ab53b8fd0e5cda4e
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change takes a snapshot from 4.14 to 4.19 as of
commit 47d149c31967 ("drm/msm/sde: Add null pointer
sanity checks").
Change-Id: Ib40428c562c3561c8a20d9849f16d13151496005
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Disable ubwc constant color feature only when inline
rotation is enabled regardless of color format.
Change-Id: I8d1e73bf955d9796823947cc8b5fbc2a176b91d3
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
