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Soumya Managoli
5c3832c4a8 ASoC: lpass-cdc: Toggle WSA fs_cnt_clr bit
During spk playback and VA concurrency,
sometimes WSA CLK goes out of sync causing
VI_TX data mute. To resolve this, everytime
after WSA MCLK enable toggle fs_cnt_clr bit.

Change-Id: Ia936f1d4843890d2ae5c02b039f502941a5427b9
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2023-04-25 23:22:33 +05:30
Ganapathiraju Sarath Varma
70ea54b385 asoc: lpass-cdc : Enable wsa clks during DAPM powerup sequence
enable the wsa and wsa2 clk as per  sequence.

Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-03-27 11:49:47 -07:00
Eric Rosas
2c2db12700 asoc: codec: Unmute WSA for ADIE loopback
Unmute WSA after enabling main path for
ADIE loopback cases.

Change-Id: I850aa4dbcf77371811010c1d614c6c7e94736971
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-02-28 11:13:56 -08:00
Sam Rainey
6b5e8148d4 asoc: lpass-cdc: Fix digital volume range
Remove platform_max setting in WSA/WSA2 drivers
to correct the volume range for digital volume.

Change-Id: Ia87c9fbeacc7bbb37b02f707b5c624a4091251d9
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
2023-01-12 10:40:21 -08:00
Yuhui Zhao
1dacaf014f audio-kernel: Compilation fixes with "Break" and "fallthrough"
Compilation fixes with "Break" and "fallthrough".

Change-Id: Ica05d0410efc5e9dc52addcf4cd8c0253f49fada
2022-10-06 22:40:29 -07:00
Ganapathiraju Sarath Varma
8280a19ab8 asoc: lpass-cdc: Handle pbr clk based with its ref cnt.
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.

Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-09-13 10:55:09 -07:00
Ganapathiraju Sarath Varma
c7d5b69be6 asoc: update out of bound check for comp_mode.
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.

Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-07-20 12:54:13 +05:30
qctecmdr
dd26499468 Merge "lpass-cdc: apply digital unmute after PA is enabled" 2022-07-12 16:14:47 -07:00
Phani Kumar Uppalapati
35ae7a451e lpass-cdc: apply digital unmute after PA is enabled
Unmute digital volume after analog PA is enabled to reduce
pop issues.

Change-Id: Iae4a5b6df3c258e1ab9976bb0a47946c5a681b08
2022-07-11 04:25:26 -07:00
Vangala, Amarnath
e275af3979 asoc: lpass-cdc: fix the vi enable sequence
Enable the VI decimator at the end of Rx and VI enable sequence.

Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-07-11 16:53:48 +05:30
Ganapathiraju Sarath Varma
e74b2a8eb5 asoc : codec : update audio path and ch_msk for VI.
Update ch_msk and audio path for VI feedback path
in lpass_wsa2 macro.

Change-Id: Ibc96fc1ad82e2e996b11af20522f35e47b94d8f0
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-06-30 00:01:28 +05:30
Prasad Kumpatla
3aa51212be asoc: lpass-cdc: fix for array out-of-bound
add fix for arry out-of-bound.

Change-Id: Ib73c41f4f9b14f21143d88b4d768285a674e5f65
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-06-06 11:38:52 -07:00
Meng Wang
14b172d92c asoc: lpass-cdc: update logic to vote during ssr
After ADSP is up during SSR, core_hw_vote may fail and audio_hw_vote
may successed in lpass_cdc_runtime_resume which is caused some timing.
When getting slave device_id, as core_hw_vote is 0, it will skip reading
swr registers and return 0 which causes fail to read correct device_id.
Make this change to avoid calling lpass_cdc_runtime_resume when adsp_up
notification doesn't reach lpass_cdc.

Change-Id: I90a97e5c47bb95180a96ba1c60b462f1fa0124b7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
2022-05-17 17:33:04 +08:00
qctecmdr
2205759439 Merge "asoc: codecs: Update WSA2 Macro to Match WSA Macro" 2022-05-16 16:12:55 -07:00
qctecmdr
401747d67f Merge "asoc: codecs: support for cps soundwire port" 2022-05-16 16:12:55 -07:00
qctecmdr
62975d84b8 Merge "asoc: codes: Update WSA Macro compander dly to 7" 2022-05-16 15:31:02 -07:00
Vangala, Amarnath
9a5deb8cc6 asoc: codecs: support for cps soundwire port
Implement backend for CPS soundwire port in Bolero.

Change-Id: Ibbd38d067e46be1a71723de04a83bc83f0ec2925
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-05-12 21:38:25 +05:30
Matthew Rice
c3cddd0b43 asoc: codecs: Update WSA2 Macro to Match WSA Macro
Propagate all changes to lpass-cdc-wsa-macro to
lpass-cdc-wsa2-macro. Leave get_channel_map alone
because it is wsa macro specific.

Change-Id: I46733a759490d488f46eda24b4006a1dec63c7cc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-10 14:11:40 -07:00
Prasad Kumpatla
c9930cc8d8 asoc: lpass-cdc: fix for array out of bounds for active ch mask and ch_cnt
update check not to exceed the array index for active_ch_mask and active_ch_cnt

Change-Id: Ic6d72d7469edbd004cd34a709384d527e90cd26f
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-05-09 10:26:33 +05:30
Matthew Rice
68469d7946 asoc: codecs: Shorten IDLE holdoff time
Decrease idle holdoff time from 60 to 29 samples as per updated
documentation.

Change-Id: Ia8786020d6de8320f057f418e743507030c734c8
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:41:28 -07:00
Matthew Rice
8027610611 asoc: codes: Update WSA Macro compander dly to 7
New requirement to update compander_ctl7 again_delay
field to 7.

Change-Id: I4c5ef15c645cabded50203bf92facbe7c8ff8c5b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:35:02 -07:00
Matthew Rice
c117389d88 asoc: codecs: Change WSA SPKRRECV control to bool
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.

Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 10:52:03 -07:00
Matthew Rice
f2b4941541 asoc: codecs: Fix PBR Battery stack settings
Update PBR battery stack register settings to write battery stack - 1
Fix register masks to reference correct bit fields.

Change-Id: I20ca099e7180b8d75dfd6ef93d8502500d53b9b7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 09:28:00 -07:00
Shazmaan Ali
a20e11e0c3 asoc: codecs: Replace dev_err/info with ratelimit prints
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited

Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-13 12:43:20 -07:00
Shazmaan Ali
aa3950aed3 asoc: codecs: remove idle detect thr func (NG)
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func

Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 13:25:38 -07:00
Shazmaan Ali
7f29f390e1 asoc: codecs: error fix for soc_component_read_no_lock
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu

Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 01:26:35 -07:00
Shazmaan Ali
572fd25838 asoc: codecs: Add Idle detect source select condition
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases

Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-11 07:04:48 -07:00
Matthew Rice
f97140fce0 asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.

Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:56 -07:00
Matthew Rice
f5d8dd3262 asoc: codecs: Add RX 6,7,8 to WSA Macro
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.

Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:24:35 -07:00
Shazmaan Ali
b62c934b61 asoc: codecs: Resolve checkpatch errors
Change-Id: I33dca97f388b524c7476e0da0ea8b1cbca4b849c
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-03-15 02:39:22 -07:00
Matthew Rice
9d7405ec04 asoc: codecs: Fix Bolero and WSA out-of-range variables
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.

Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:02:03 -08:00
Matthew Rice
72f737377e asoc: codecs: Fix lpass_cdc_wsa_macro_read_array
Update function to correctly read array from device tree.
Previously not reading values and returning -EINVAL.
WSA bat_cfg/rload/sys_gain are now correctly configured.
Also add softclip clock enable during pbr config.

Change-Id: Ia1b93acfde3e799b3b72e05966d0fa955c3f49ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-02-17 11:41:34 -08:00
Shazmaan Ali
5fd6cafe49 asoc: codecs: Add source select between PRE-LA and LEGACY
Add idle detect source select based on NG mode,
if NG2 then source is PRE-LA else LEGACY

Change-Id: I4e0cb3825960e6b795038fb5e85cfaa7a2fbfe62
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:26 -08:00
Shazmaan Ali
ff568161d0 asoc: codecs: Add idle detect control for WSA macro
Add idle detect enable for mixed control path,
and update copyright markings

Change-Id: Idf2932cd1813082f60ee96010788cdb1ef36afbf
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:22 -08:00
Matthew Rice
9284d9af02 asoc: codecs: Implement lpass PBR feature
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.

Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:30:01 -08:00
Matthew Rice
311264875e asoc: codecs: Change WSA config params acquisition
Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.

Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:29:37 -08:00
Meng Wang
322f08f457 asoc: lpass-cdc: reset RX_TX_CORE_CLK and WSA_TX_CORE_CLK during SSR/PDR
Sometimes after SSR/DPR is triggered, RX_TX_CORE_CLK, WSA_TX_CORE_CLK
and WSA2_TX_CORE_CLK are not reset which causes WSA or WCD not
detected. Make this change to add reset during SSR.

Change-Id: I343f2f92244de3eee844e220a6201b389dc647b4
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-09-28 14:23:52 +08:00
Laxminath Kasam
001ba433b2 wsa: soundwire: Add support for 4p8MHz DAC rate
Add support to use 4p8MHz DAC rate for receiver over WSA.

Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:22:09 -07:00
Laxminath Kasam
ae258cb2f8 asoc: wsa883x: Update low_noise gain for receiver
Add changes to use wsa883x for receiver with
low_noise mode settings.

Change-Id: Icfa43ebbdb1e366f365053535f541bee03751ca3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:19:46 -07:00
Junkai Cai
63db490176 asoc: lpass-cdc: return error when requesting incorrect state
Thermal framework is expected an error to be returned if the requested
cur_state exceed the max_state.

Change-Id: I1e0d8124a1aa6c0d755b35225207638aefdcb464
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-08-19 14:25:57 -07:00
Vignesh Kulothungan
1065b55645 asoc: codecs: update cb decode register control
Update central broadcast register control to enable bcl path.

Change-Id: Ibc05289d9cdd41e81369c6ef2547eceffa36d73a
Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
2021-08-09 12:17:38 -07:00
Meng Wang
aa18085092 asoc: lpass-cdc: remove broadcast for wsa-macro
When multi wsas are connected to wsa-macro and some registers
are written to wsa, swr broadcast mode is used. When closing
one wsa, it will also send the register write to the other wsa
and it should not get updated. The other wsa will be in bad
state.
Remove broadcast for wsa-macro to resolve this issue.

Change-Id: I4c788a213fdcd217861703a13d44c096fd9b632d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-13 09:08:55 +08:00
Junkai Cai
29cda5976d asoc: lpass-cdc: update WSA/WSA2 cooling option policy
cooling of WSA/WSA2 is to reduce the digital gain.
the cooling callback should only be called when the WSA pointer
has not been initialized.
Also the adjusted volume of RX0 and RX1 need to be set separately.

Change-Id: I6aac0e7a3a3219e8b5c24d711a6c7773824827e9
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-27 12:18:45 -07:00
Junkai Cai
9107dae9d8 aosc: codecs: set mclk flag false when mclk is disabled
the dapm_mclk_enable flag has not been set back to false
when the actual mclk is disabled.

Change-Id: Ic04756b3dcd074887dd1e93f23cf31873abc1428
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-27 12:00:04 -07:00
Junkai Cai
751d49a88b asoc: lpass-cdc: reduce WSA digital gain when cooling is enabled
The digital gain will be adjusted lower than what userspace set
during playback if the device temperature reach the threshold.

Whenever digital gain is changed from userspace, codec will check the cooling
state and adjust the gain.

Change-Id: I52df0f96cf20b90a9bdad70b9c117eed82145fb2
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-06-07 05:14:17 -07:00
Laxminath Kasam
5a96e4bc5b asoc: lpass-cdc: Update core voting before gfmux access
GFMUX access in va clock supported in lpass-cdc v2p5
onwards. Ensure add core voting before access.

Change-Id: I36c8db86a2e7f265ab293dd6cd1f1ee3ac7722a5
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-05-24 01:45:01 -07:00
Laxminath Kasam
01756036b5 asoc: lpass-cdc: Update swr pdev initialize order
During sound card register init call, if swr pdev
is not initialized yet respective soundwire port
config is not updated to soundwire controller device.
In macro drivers, update swr pdev into macro private
data prior to platform device add.

Change-Id: Ifa67471cfc7a10b102b573df6285e598bb0b5e5e
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-04-26 07:50:25 -07:00
Meng Wang
195771b877 asoc: lpass-cdc: update correct offset for compander and softclip
Update correct offset for compander and softclip.

Change-Id: Ic4071a25911db0c6c57d550e98d63e663354f62d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-04-26 05:47:12 -07:00
Vatsal Bucha
ea36f4ea68 asoc: codecs: add child devices after completing initialization
In va, rx and wsa macros, move schedule_work call to
add the child devices to the point later to where the parent
initialization gets completed.

Change-Id: I2095f1007beae253534b2ed44f988ce55fad6b75
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-22 04:39:59 -07:00
Vatsal Bucha
a5ca4621d9 asoc: bolero: Add core_vote before gfmux access
GFMUX access happen during WSA macro usecase.
Update wsa macro to do core_vote before clock
request.

Change-Id: I8f7eb67b87845016b54c9873a6fc230d207262f7
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
2021-03-22 04:39:40 -07:00