1. add more function pointers for the remainder functions which are
generic
2. assign functions to per chip level
3. prevent using generic rx_pkt_tlv struct and using at a per soc
specific instead
Change-Id: I1cefb10c7a70f04dbf8b110fcfee6f1c9f4ab1a0
CRs-Fixed: 3533521
The kernel-doc script identified some documentation issues in the
hal/wifi3.0/qca6390 folder, so fix them.
Change-Id: I56bf59aea331e4f720610436222af824ee0265d7
CRs-Fixed: 3410710
In order to support flow overide feature,
AST table has to be split between RxPCU and DDR.
With this split, RX monitor cannot make use of
ast_index to fetch peer as it is not from DDR.
So make use of sw_peer_id to fetch peer.
This sw_peer_id is derived from RX_MPDU_STAT_START_TLV
Change-Id: Ib2a003a2640fded3287c318d2ad59fd3127af9b6
CRs-fixed: 3004363
Due to recent FW changes not filtering out BAR frames, redirect these
frames to REO exception ring and handle as normal data packets.
Change-Id: I4540929fddab14de57a23f6364fc916a70057cbe
CRs-Fixed: 2795499
Rxdma decrypt errors are observed when the association
is in progress as AP sends encrypted data packets to
DUT-STA. As part of the rxdma error handling, excessive
prints are logged to console resulting in an assert.
Fix is to rate limit rxdma decrypt error related log
Change-Id: I2ef28c635d77e3acafd067b921cdb13c277756c7
CRs-Fixed: 2725335
fix the issue for block ack/ack for tx capture mode.
1. Hanndle BAR frame.
2. set rate for ACK frame.
3. Check block ack session and use block ack if block
ack session is established.
4. no ACK for broadcast probe request.
5. not ack if the ack policy is set to no ack in qos control.
Change-Id: I4f22c1c976334978fb971b42319fb3a6e43a00c2
sw_frame_group_id decides process for frame. USER_STATS tlv case uses
sw_frame_group_id to add qos_null frame control to rx_status.
Change-Id: Ia3da8dbe4fc4c2d0f21fa8864e6b4e87170ba8f6
Implement hal_rx_tlv_get_tcp_chksum API
to retrieve tcp_udp_checksum value
based on the chipset.
Change-Id: Ifab970f10af06f8c0cdbd14d57cb66b49bae1648
CRs-Fixed: 2522133
Implement hal_rx_msdu_cce_metadata API per
chipset as the macro to retrieve the cce_metadata
value is chipset dependent.
Change-Id: Icd87d4ac32be78d69b24da106381a7669c86ada6
CRs-Fixed: 2522133
Implement hal_rx_msdu_fse_metadata API per
chipset as the macro to retrieve the fse_metadata
value is chipset dependent.
Change-Id: Iae7f532460b5203af2f95c504a6941c0b18b665e
CRs-Fixed: 2522133
Implement hal_rx_msdu_flow_idx_timeout API
per chipset as the macro
to retrieve the flow_idx_timeout value is
chipset dependent.
Change-Id: I03030e3763b3c4a9099699a2d24b8110961610cf
CRs-Fixed: 2522133
Implement hal_rx_msdu_flow_idx_invalid API
per chipset as the macro
to retrieve the flow_idx_invalid value is
chipset dependent.
Change-Id: I5b8622eb896456b7388016a16657048d0da4e970
CRs-Fixed: 2522133
Implement hal_rx_msdu_flow_idx_get API
per chipset as the macro
to retrieve the flow_idx value is
chipset dependent.
Change-Id: I75131d7c048f5b67489ed25fbd52bfcf01bab782
CRs-Fixed: 2522133
Add the following macros:
1. HAL_REO_CONFIG
2. HAL_RX_MSDU_DESC_INFO_GET
3. HAL_RX_LINK_DESC_MSDU0_PTR
Add the relevant function pointers to
retrieve the descriptor info from the
above mentioned macros based on a
given chipset.
Change-Id: If44ae3d91397f1b1b0c36a49ce56a2c5e719434e
CRs-Fixed: 2522133
Add the following macros:
1. HAL_RX_GET_FC_VALID
2. HAL_RX_GET_TO_DS_FLAG
3. HAL_RX_GET_MAC_ADDR2_VALID
4. HAL_RX_GET_FILTER_CATEGORY
5. HAL_RX_GET_PPDU_ID
Also add function pointers to
retrieve the flags from the above
macros.
Change-Id: I334b198588ceba77cd30bdde7ebc500cdbe18358
CRs-Fixed: 2522133
Add the following HAL macros:
1. HAL_RX_MSDU0_BUFFER_ADDR_LSB
2. HAL_RX_MSDU_DESC_INFO_PTR_GET
3. HAL_ENT_MPDU_DESC_INFO
4. HAL_DST_MPDU_DESC_INFO
Add relevant function pointers to retrieve
descriptor info from the macros based
on chipsets.
Change-Id: I99ce7566a668180c7849eedea915b6f23a8dbf35
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_sa_sw_peer_id API
based on the chipset as
the macro to retrieve sa_sw_peer_id value is
chipset dependent.
Change-Id: I2efd1f851539bbffc8f75c7662045c1f4a3c4469
CRs-Fixed: 2522133
Implement hal_rx_mpdu_start_mpdu_qos_control_valid
API based on the chipset as
the macro to retrieve mpdu_qos_control value is
chipset dependent.
Change-Id: I61449ff5afc958f1a1f93013b0c5ab56d38cc833
CRs-Fixed: 2522133
Implement hal_rx_get_mpdu_sequence_control_valid
API based on the chipset as
the macro to retrieve sequence control valid
value is chipset dependent.
Change-Id: I01a006094d0330060e9ff1a91200c48c2426f38d
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_addr4 API based
on the chipset as the macro to retrieve
addr4 value is chipset dependent.
Change-Id: Ie35d01de1619a8ab540bb1b2019a15b436efb7d4
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_addr3 API
based on the chipset as
the macro to retrieve addr3 value is
chipset dependent.
Change-Id: I3983599b656e82170de5905c08daee3ec164e7a0
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_addr2 API
based on the chipset as
the macro to retrieve addr2 value is
chipset dependent.
Change-Id: I4026db892d4f2f41db72c50f780ba898b8a17fa7
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_addr1 API
based on the chipset as the macro to
retrieve addr1 value is
chipset dependent.
Change-Id: I7ed88f2243d397c9d605a08d3b93e17f0004c63d
CRs-Fixed: 2522133
Implement hal_rx_get_mpdu_frame_control_valid API
based on the chipset as the macro to retrieve
frame control valid value is chipset dependent.
Change-Id: I49d16ae44b2e9567ff746d2088058f0c1025ea40
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_fr_ds API
based on the chipset as the macro to
retrieve for_ds value is chipset
dependent.
Change-Id: I6d41d02ac50cae752567d98645f0447cc122a84f
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_to_ds API based
on the chipset as the macro to retrieve
to_ds bit value is chipset dependent.
Change-Id: I36d9d14e226bcc604b91d8aecbe52836c5a12272
CRs-Fixed: 2522133
Implement hal_rx_mpdu_start_sw_peer_id API
based on the chipset as the macro to retrieve
sw_peer_id value is chipset dependent.
Change-Id: Ifebaf2430731f5e0593dde4789d721e9fe7ce7c1
CRs-Fixed: 2522133
Implement hal_rx_get_mpdu_mac_ad4_valid API
based on the chipset as the macro to retrieve
mac_ad4 value is chipset dependent.
Change-Id: I9d7cc90e798d4f0775e915fe6edcb1a1f5129490
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_last_msdu_get API
based on the chipset as the macro to retrieve
last_msdu value is chipset dependent.
Change-Id: I561c28a49062d7b650e68c5a4ce4da0183be34d6
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_dat API based on
the chipset as the macro to retrieve da_is_valid
value is chipset dependent.
Change-Id: I79f06eaa2576e7516c21f963b2c149aac7f62c64
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_first_msdu_get API
based on the chipset as the macro to retrieve
first_msdu value is chipset dependent.
Change-Id: Iea325159a0349c45a249c1ae113664c41a54b0f1
CRs-Fixed: 2522133
Implement hal_rx_print_pn API based on the
chipset as the macro to retrieve
pn value is chipset dependent.
Change-Id: Id9d0d3b34a5f6a09fe5903e1d24bb0a59205174b
CRs-Fixed: 2522133
Implement hal_rx_encryption_info API based
on the chipset as the macro to retrieve
sa_idx value is chipset dependent.
Change-Id: I0c48800dfa5628898c53f7a9271e517b6bfa3da7
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_l3_hdr_padding_get API
based on the chipset as the macro to retrieve
sa_idx value is chipset dependent.
Change-Id: Ice1fc2d70e339dc1d80fa6f34f37c5a7aa074be5
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_sa_idx API
based on the chipset as the macro to
retrieve sa_idx value is chipset
dependent.
Change-Id: Ib874520be9e7ad778c2a9a3c415e5c3047450b31
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_sa_is_valid_get API
based on the chipset as the macro to retrieve
sa_idx valid bit is chipset dependent.
Change-Id: I8bcb7030554331922ed12ea9da3ef51cd64b5c40
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_da_is_mcbc_get based
on the chipset as the macro to retrieve
mcbc value is chipset dependent.
Change-Id: I860d259515c31345501080577d7a34beb97e5f60
CRs-Fixed: 2522133
Implement hal_rx_get_rx_fragment_number
based on the chipset as the macro
HAL_RX_MPDU_GET_SEQUENCE_NUMBER is
chipset specific.
Change-Id: I967190fa3a55d45f46760f58eab5007bf5fa908f
CRs-Fixed: 2522133
Revert change "Limit maxinum nss number as 2 for MCL platform" and
align with WIN function: hal_rx_msdu_start_nss_get_8074v2().
besides, only increase rx.nss[NSS - 1] when NSS is > 0 and rx packet
type is 11N/AC/AX.
Change-Id: I0a64f00a3d252c806216cc3196e71290f111c88a
CRs-Fixed: 2429329
Some of the print messages in HAL module come very excessively.
Use hal_verbose_debug() API to print them.
CRs-fixed: 2405028
Change-Id: I4b4754af65c00edb571de898527026b6183ef15f
As a hot fix before h\w part change, just limit maxinum nss number
to 2 for MCL platform.
CRs-Fixed: 2377796
Change-Id: Iad205804be90b6803ff2f1afa79076dde9b77013
Currently we are printing one single big print to dump the RX TLVS. This
is causing truncation at the QDF_TRACE level, which can accommodate only
512 bytes or so right now. Split the RX TLV print, so that it can fit
int the QDF buffer.
CRs-Fixed: 2370080
Change-Id: I1385ab0dfe2a52e34132487ac55973e291d84db5
In monitor mode, the packet type is wrongly filled radiotap header as
11n when the actual incoming packet is 11b frame.
The packet type field is common for all MPDUs and is obtained from
PPDU_END_USER_STATS and hence no need to overwrite that value from the
MPDU specific TLV in the function hal_rx_mon_hw_desc_get_mpdu_status
Change-Id: I97f96e64012636f562f7ac2e4a91b63ffc7553db
CRs-Fixed: 2333915
Some of the macro names defined in qca8074v1, are defined with
a slightly different name in qca8074v2, and few macros have the
same name in both headers but are defined with different values.
Fixed the same.
Change-Id: I5e948baf5326d1d8fdfa2bd7ee8aa072c710d17c
Removed qdf exports on functions defined in target specific
header files and defined those functions as static. Revert
changes on hal_rx_msdu_end_sa_idx_get and make
hal_rx_msdu_end_da_idx_get target specific
Change-Id: I2858b1d77118f0a26b54bf983bd342c7a4fe757d
implement qca6390 target specific hal_rx_msdu_end_sa_idx_get,
hal_rx_dump_msdu_end_tlv as these routines differs a bit from
rest of the lithium chipsets. this target specific function
will be called through callbacks
Change-Id: I4b71da2d39217c2920597fb36c936218359e6c3a
hal_hw_srng table and register offsets array, some target specific
functions are defined separately for each new target.
define the same for qca6290.
Change-Id: I08c1243bc50460fac776e28186acfa192fb1ff66
