Commit Graph

16 Commits

Author SHA1 Message Date
Christina Oliveira
21ca2acab9 disp: msm: sde: add support for hwfence profiling
This change adds hwfence input and output fence profiling
registers and debugfs to enable them.
To enable input hw fences timestamps:
echo 0x1 > /d/dri/0/debug/hw_fence_status
To enable output hw fences timestamps:
echo 0x2 > /d/dri/0/debug/hw_fence_status
To enable both, input and output hw fences timestamps:
echo 0x3 > /d/dri/0/debug/hw_fence_status.

Change-Id: I269a38f3843a01ec8c0816890e50bb7d847a4ed9
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2022-05-18 09:38:40 -07:00
Christina Oliveira
0e20e27cc1 disp: msm: sde: adds mem mapping for hwfence ipcc reg
This change adds one-to-one memory mapping for the hwfence
ipcc register memory needed for hw fence feature.

Change-Id: I0e264183e02d0ed5f2254b409cc5e776d670f0dc
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2022-05-16 12:44:45 -07:00
Christina Oliveira
640c8111d3 disp: msm: sde: add support for hw-fence feature
Starting mdss 9.0, dpu supports triggering
the frame fetch through hw-fencing. This change
adds support for this hw-fence feature.

Change-Id: Icc7d0b69fc2a51103d14612f5ac89b44a47ed826
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2022-05-16 12:41:28 -07:00
Raviteja Tamatam
2d4e001512 disp: msm: sde: SID programming for new MDSS
SID registers and offsets are changed in display
MDSS 9.0.0. Changes are made to program these new registers.
Also, added new revision check for backward
compatibility.

Change-Id: I4e1ea374f38c95a4d1019c2596418bb6bb7c5347
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2022-03-14 15:21:56 -07:00
Steve Cohen
d9794d82cd disp: msm: sde: remove sde_hw_blk
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.

Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Veera Sundaram Sankaran
506508e1cd disp: msm: sde: remove unused functions from sde code
Cleanup unused functions from all modules in sde driver.

Change-Id: Ia0e72ab9c281b4200a63ce35bf184e83fe1db5d2
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-05-09 11:41:54 -07:00
Samantha Tran
e778d2688e disp: msm: sde: add support for WD timer on INTF
Watchdog timer is moving from TOP to INTF. This change adds
support for movement and ensures backwards compatibility.

Vsync select only needs to specify whether or not to use
Timer 0 associated with the interface. It does not need to
select between Timer 0-4.

Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Change-Id: I9d89a8cb1ea607e9fc0bdbffa0a6a9acceff7f13
2021-02-12 13:49:31 -08:00
Veera Sundaram Sankaran
b403c57119 Revert "disp: msm: sde: use mdp scratch register to pass drm mode info"
This reverts commit e8309fcbf5. Removing
the scratch register logic to pass information between the VMs as the
design changed from kernel to user-mode for passing the mode information
through qrtr from primary-vm to trusted-vm.

Change-Id: Ibfa4b0004496f68b272da808e866f5226b02c013
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-11-18 16:56:50 -08:00
Veera Sundaram Sankaran
e8309fcbf5 disp: msm: sde: use mdp scratch register to pass drm mode info
Use MDP scratch registers to pass drm mode index information
between the VMs. Expose the APIs which LA VM can use to set
the current mode for all active displays before handoff.
LE VM relies on this information to set the corresponding
display in correct mode during handoff.

Change-Id: I4569dd58e953e588bca816ac718335d3f3f7e29b
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-07-16 10:43:50 -07:00
Dhaval Patel
31d4bb10a6 disp: msm: sde: add xin client clock status for wb2
CWB may trigger frame missed message if interrupts
are disabled on specific CPU. WB2 will only find single
interrupt status for two posted start triggered frame.
SDE driver will start checking the xin client clock
status for wb2 timeout case to trigger the valid
frame done status.

Change-Id: I16a99667116732002e6dec8a18330f8b45199387
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-19 16:28:14 -07:00
Veera Sundaram Sankaran
bfec52ae7b disp: msm: sde: add SID setup function for pipes and lutdma
Add SID setup function to help programming
the SIDs for all the pipes and lutdma xin clients
based on the VM.

Change-Id: Iea598303b480b33de8750e0988129dd5cdfe7572
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:31 -07:00
Dhaval Patel
1a9e3bae54 disp: msm: sde: update autorefresh disable sequence
Autorefresh might be still in enabled state after
write_ptr reached to display height. This patch
checks the autorefresh status bit and keeps polling
the bit till autorefresh sequence is in enabled
state. It times out after 1 second if autorefresh
is still in enabled state.

Change-Id: I5d4f4cb35e5cc8c680c1878f52cee385f709d764
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:42 -07:00
Ramkumar Radhakrishnan
664d297f98 Revert "disp: msm: sde: Add LTM sw fuse check support"
Reverting the change to check for LTM SW fuse to install LTM properties
during probe since LTM SW fuse is enabled later.

This reverts commit 652b195ba4.

Change-Id: I19b3e04ff7caaad5de896fbcf433c3b1863ac4f9
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
2019-10-10 14:14:43 -07:00
Ping Li
652b195ba4 disp: msm: sde: Add LTM sw fuse check support
Add checks for LTM sw fuse value to only install the LTM properties
when the LTM sw fuse is set to enable.

Change-Id: I6876bfcf12ddb912e7b7a80e07c33108fd4b85b9
Signed-off-by: Ping Li <pingli@codeaurora.org>
2019-07-17 13:03:39 -07:00
Samantha Tran
1ab07a4d7c disp: msm: add changes missing during snapshots
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-06-03 09:07:38 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00