Commit Graph

102 次程式碼提交

作者 SHA1 備註 提交日期
qctecmdr
88877f3037 Merge "disp: msm: sde: add sde data to va minidumps" 2021-08-15 18:31:12 -07:00
Jayaprakash Madisetty
dad1b5f51e disp: msm: sde: handle spec fence bind failure case as non fatal
Add changes to handle speculative fence bind failure case with
invalid userfd as non fatal scenario and stage white frame in such
case.

Change-Id: I1386bfc5ecb5107ab100be220c24597f883d9bd6
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-07-27 13:22:51 +05:30
Andhavarapu Karthik
76d171e611 disp: msm: sde: add sde data to va minidumps
VA minidumps supports to add any allocated variable or data to
minidumps. Add panic notifier and wrapper function to add
sde data to minidump va. Add event log, register log, register dumps,
debug bus and different sde variables and states info to minidump.

Change-Id: If54da0b7067df17877e4da645d82f1705baa3f6d
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-07-19 16:00:57 +05:30
Ping Li
1971601fbd disp: msm: sde: assign correct size for sspp color proc feature data
Instead of hard coding the size of the blob data, pass the exact
size retrieved from drm property framework to color processing layer.
Color processing layer has size check to make sure the blob data size
matches the expected size.

Change-Id: I277f9be1ba84e4e4707847756a9ed0ea1ed23f53
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-06-17 20:56:11 -07:00
Linux Build Service Account
b3097f1990 Merge "disp: msm: sde: fix qos lut index calculation for high refresh rate" into display-kernel.lnx.5.10 2021-05-21 10:05:11 -07:00
Prabhanjan Kandula
c35d5ca0cc disp: msm: sde: fix qos lut index calculation for high refresh rate
Fix qos lut offset calculation based on the refresh rate index.
Current calculation is not accounting qos lut size for qseed and non
qseed lut types.

Change-Id: I281fa7b3a245ad9f4a3d2ba45bb5957c3900abd6
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-05-19 14:48:55 -07:00
Abhijit Kulkarni
944a0629f5 disp: msm: sde: fix cont splash pipe identification
This change fixes the continuos splash logic that identifies the
pipes staged by bootloader. The same code flow is used in trusted ui
handover as well. Existing logic was counting the pipes twice if the pipe
is staged on both the layer mixers. This change simplifies the pipes
already staged before handover by using the pipe index to convey if
it is staged or not.

Change-Id: Idb255f2077161dc3553114ac5d04e0ef743bb5ea
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-05-14 12:23:57 -07:00
Samantha Tran
978edfa200 disp: msm: sde: check for valid pointer before accessing
This change initializes a variable as null to account for cases
when it is not set. This change also ensures proper pointer
checks before attempting to access function pointer.

Change-Id: I2f06a0877293668e80bee9d9b82d412476dc5184
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-27 16:07:29 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
Abhijit Kulkarni
559620308e display: msm: sde: update qos lut after scaler config
This change moves the code of updating the qos lut for qseed3
to each plane after updating the scaler configuration. This
avoids using stale values for qos settings.

Change-Id: I2c55a98e1ba9790d596c55160933cd5afd2388e5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:32:30 -07:00
Xiaowen Wu
2f36a8f57a disp: msm: sde: add scaler3_cfg and pixel_ext to sde plane
Add scaler3_cfg and pixel_ext to sde plane to avoid updating state
variables in commit thread. This fixes atomic check failure when
scaler lut is not set.

Change-Id: I936b124ca6f90af22a87df31536204e837422a70
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:31:44 -07:00
qctecmdr
2177667f89 Merge "disp: msm: sde: remove rotator llcc" 2021-03-24 16:52:43 -07:00
Tatenda Chipeperekwa
c6257272d4 disp: msm: fix compilation errors for dlkm compilation
Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.

Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2021-03-22 15:25:36 -07:00
Prabhanjan Kandula
68b83b3ffc disp: msm: sde: update uidle fal1 maximum threshold for waipio
This change provides support to have per target configuration
of the maximum value for fal1 threshold & updates value for waipio
as per qos recommendation.

Change-Id: I48df0d1c58a8de80f40200b35e406d07621a3f68
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-03-18 17:25:51 -07:00
Prabhanjan Kandula
0c31168eff disp: msm: sde: update qos lut configurations for waipio
This change refactors qos lut configuration by redefining & adding
few new lut usage cases for supporting waipio qos recommendations.

Change-Id: I62607208c289c6ffee32fc8008066eb603acb504
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-03-18 17:25:13 -07:00
Dhaval Patel
b5cde14bca disp: msm: sde: calculate line_time once during modeset
Calculate line_time once during modeset and allow
each plane to use it instead of calculating for each frame.
It also simplifies the line_time calculation for
command mode display.

Change-Id: I94ce29eec94bfdbee9016fbf93378661ebf79c03
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-03-18 15:03:30 -07:00
Nilaan Gunabalachandran
b9cfa5b37f disp: msm: sde: remove rotator llcc
Rotator llcc is no longer supported. This change removes the
unused code.

Change-Id: Ia1d95e3f4386d25e0d2e06a87802b3f5b694998d
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-03-18 12:33:24 -04:00
Gopikrishnaiah Anandan
1d39b8a5a9 disp: msm: sde: add checks for hfc feature enablement of demura
HFC feature of demura needs a skip blend plane to be set. If skip blend
plane is not set and HFC feature is requested to be enabled, driver
should skip turning on HFC demura feature. Change adds checks to ensure
that HFC is always enabled with skip blend plane staged.

Change-Id: I923359c7cb143867660b4c1e667f56ed42fa51c9
2021-03-17 11:22:08 -07:00
Gopikrishnaiah Anandan
0c2aa527bf disp: msm: sde: fix partial update offset calculation
Panel height and width should be passed for partial update offset
calculation. Change passes the offsets to demura partial update
function.

Change-Id: Ic4113d46e8c1643a855f672e7a2bdd848ef99adc
2021-03-17 11:22:08 -07:00
Christopher Braga
812782e76b disp: msm: sde: check fetch active registers for active data planes
Continuous splash setup checks the CTL configuration to determine and
log all planes that have been enabled for continuous splash boot.
This logic currently only checks the planes mapped to each LM on
a given control path, resulting in data planes being missed.

Update the boot plane enumeration logic to additionally check the CTL
fetch active registers to detect and log missed planes. This logic
checks against all planes found through the original enumeration path
to avoid logging the same plane twice. Note that planes found via the
fetch registers are assumed to be used across both rectangles due to
hardware logging limitations.

Change-Id: Ic1f4aaba94111fe096ba9764eeaef242beb6adf5
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Christopher Braga
db39b61a5f disp: msm: sde: populate DRM pipeline setup during cont-splash
Declare the continuous splash pipeline setup to userspace by filling
in the DRM states for all plane, crtc, encoder, and connector objects
in use. This information will be treated as an 'informative' state,
and will be cleared at the start of the first commit to maintain
the DRM methodology of DRM clients being the only controller of
the pipeline. This ensures any configuration provided by userspace
is accepted and applied, even if it may already align with the setup
done by continuous splash.

This DRM state configuration is done via manual modification of the
DRM object states. Modification via the exposed DRM UAPI functions
is not possible due to no drm_atomic_state object linking the DRM
pipeline objects together.

Change-Id: I67650e05aafbb4e799cf60939f0595bc3786fc6e
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
qctecmdr
3b347d347c Merge "disp: msm: sde: replace demura pipe index cap. with general pipe index" 2021-02-17 12:40:11 -08:00
Christopher Braga
9a5a42c453 msm: drm: sde: Add support for FP16 via AHB programming
Introduce support for the FP16 format and FP16 color processing
blocks. This includes support for FP16, FP16 UBWC, and inline
rotation on tiled FP16 pixel data.

Change-Id: I06a70cab5447140598682f687129d4f8662524b2
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-02-11 12:31:22 -08:00
Samantha Tran
73373271a7 disp: msm: sde: add multirect error status for ubwc and meta
This change adds support for error checking ubwc and meta error status
based off whether REC0 or RECT1 is used.

Change-Id: I7c39755da99a9d6c0d02b4ef16fa93b8ec7458a9
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-02-09 22:12:38 -08:00
Christopher Braga
d036a97b00 disp: msm: sde: replace demura pipe index cap. with general pipe index
Generalize the demura pipe index capability on sde_plane objects to
instead provide the relative pipe index for all plane types. This
information can be used by clients to fully determine a plane type
and its position.

Change-Id: I597da0dab92c249b16934b9327353e4937635606
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-01-22 14:59:42 -08:00
Amine Najahi
08358fd857 disp: msm: remove use of drm_display_mode vrefresh
Use of drm_display_mode vrefresh is being deprecated in
upstream DRM framework. Downstream driver need to use
drm_mode_vrefresh API from now on.

This change removes dependency on drm_display_mode vrefresh
and replaces it with drm_mode_vrefresh API in SDE, DSI and
DP driver. In addition, it also modifies drm_display_mode clock
to align with upstream approach where an uncompressed mode clock
is required to match drm_mode_vrefresh API.

Change-Id: Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-01-13 16:08:27 -05:00
Yashwanth
312bd53656 disp: msm: sde: update input fence after plane state destroy
In few cases, even though input fence is freed, it might
get accessed through debugfs node while dumping fence list.
This change updates input fence to NULL in plane state
destroy once it is freed to prevent accessing it further.

Change-Id: I1a3799249e6a177af87653e17d014d1dad7ca638
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-09-28 11:53:39 +05:30
Nilaan Gunabalachandran
2a3fe5e4c5 disp: msm: sde: skip unnecessary cache register programming
Plane update will call system cache update, and by default,
will clear any cache programming. This clear is only necessary
after returning from a cached state. This change will reduce
unnecessary programming and event logs if the sys cache
was previously disabled and remains disabled.

Change-Id: I7f560ff24990a8c7ad785e560873193b7bf3a491
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-09-10 08:33:23 -04:00
Lei Chen
fb4edab2b3 disp: msm: sde: Update UIDLE and QoS LUT when DRM mode is changed
UIDLE and QoS LUT configurationis might be different between
different frame rates.
Add this change to update UIDLE and QoS LUT according to frame
rate when DRM mode is changed.

Change-Id: Ia16a963e185b911b7dd11e81a26cab732c2b185c
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-08-18 09:56:43 +08:00
Narendra Muppalla
cea2d1cef0 disp: msm: sde: add macro for default fps
This changes adds macro for default fps.

Change-Id: Ieb1d38bd6fbfcd3fec7e2cc6e39636b6297dd0ef
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-07-22 13:07:45 -07:00
qctecmdr
e3dc3592ec Merge "disp: msm: sde: don't advertise rotation for virtual planes" 2020-07-14 12:28:45 -07:00
qctecmdr
47918b2ba5 Merge "disp: msm: sde: update uidle wd timer load value and fal1 threshold" 2020-07-13 02:05:31 -07:00
Abhijit Kulkarni
0b68037224 disp: msm: sde: fix qos perf for 90Hz panel
This change fixes the issue in selecting the correct
perf index for the 90Hz refresh rate, before this change
values corresponding to 60Hz were getting applied for this
refresh rate.

Change-Id: Id4f8af4da95f0d13d30f6316dc26dd65b61d7f79
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-07-01 10:24:05 -07:00
Steve Cohen
5346598663 disp: msm: sde: don't advertise rotation for virtual planes
For existing HW, in-line rotation is only supported on master
planes. Remove publishing support for rotate-90 and rotate-270
on all virtual planes. Also, fixup the published support for
180 degree rotation which can be performed on all pipes that
have both X & Y axes reflections.

Change-Id: Iff248abeefeb2a100ffd833d94b429b47b6d407b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-06-30 01:04:14 -04:00
qctecmdr
1b5e5c1590 Merge "disp: msm: specify default value for msm enum property" 2020-06-27 23:15:27 -07:00
Samantha Tran
d46c9286e5 disp: msm: sde: update uidle wd timer load value and fal1 threshold
Update the uidle wd timer load value to 18. This change will allow
a 15us wd timer per hardware recommendation.

Update fal1 threshold value to take the minimum of 15 or the
current setting which takes line time and target idle time into
consideration. The target idle time is also being updated from 10us to
40us.

Change-Id: Ia8d9c2070813beef18fdf342526d82cf8f82989b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-06-26 13:54:33 -07:00
Prabhanjan Kandula
f946219084 disp: msm: sde: update sspp multi rect programming
Current SDE driver allows staging of rect1 only configuration. When a
real plane is disabled sspp multi rect configuration is not updated.
This can lead to iommu faults and ping pong timeouts as framebuffer of
disabled plane is unmapped. This change fixes it by updating multi rect
config accordingly when a plane is disabled.

Change-Id: I67ae45ad0e607184c7fc49f4b220220ba1d8a2ae
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-19 16:45:29 -07:00
Jeykumar Sankaran
b87b13690b disp: msm: specify default value for msm enum property
Allow caller to specify the default value of the enum
property while installing with msm prop layer. It is
not always the case that the default value to be the
first entry.

Change-Id: Ie0bb1ad7479e3e07810b3d817fdf618b1935858c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-17 15:36:33 -07:00
Jeykumar Sankaran
fdf88f7853 disp: msm: sde: add dt property for QSEED scalar HW revision
QSEED scalar block HW revision is constant for a given MDSS revision.
Both SSPP and DS HW files invoke this API to read the revision register
at various points of time. Expose this revision information through
DT binding and maintain in the catalog to avoid repeated register
reads.

Change-Id: I95c0a5242cfda0aaa4ec5c2ff5c7cc0bed191b59
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-12 14:29:42 -07:00
qctecmdr
68a42554a1 Merge "disp: msm: sde: remove pipe fetch halt check on real plane" 2020-06-12 03:53:37 -07:00
qctecmdr
d9b4204aad Merge "disp: msm: sde: add vig formats before qseed and csc initializations" 2020-06-12 00:11:19 -07:00
Dhaval Patel
5d8bfac54d disp: msm: sde: remove pipe fetch halt check on real plane
SDE driver started supporting multirect mode with rect_1 only
configuration. In such case, master plane can not trigger
pipe fetch halt independently. This change removes the pipe
fetch halt check completely because it was only done for
master plane without buffer flip usecase. AXI fetch halt
provides similar functionality during idle power collapse
and suspend-resume.

Change-Id: I79d9d0eac2de95f1bb88561c7cc259e0cc4b2ca4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-10 18:23:11 -07:00
qctecmdr
621a624d8c Merge "disp: msm: fix kw issues in sde driver" 2020-06-10 17:06:50 -07:00
Yashwanth
45e57a9f87 disp: msm: sde: add ubwc verification during plane atomic check
In targets where ubwc is not supported, atomic check
should fail and return a error value if the input format
is ubwc.

Change-Id: I21a40f510cc852e64fbcc05a5fb4848da4b4faaa
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-06-08 11:39:31 -07:00
Narendra Muppalla
5a1af16b1a disp: msm: fix kw issues in sde driver
This change addresses out of range and null checks in
sde driver.

Change-Id: I4ee82760ce3ee7053c336e49ec9eaae8b4c31b1e
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-06-05 10:48:46 -07:00
Prabhanjan Kandula
71f615345a disp: msm: sde: fix system cache feature enable
In current driver if client did not reset system cache
crtc property, system cache write state is on forever and
breaks the system cache feature. This change restricts
entering into cache write state only if it's commit right
after idle notify. This change also adds event logs to
capture system cache feature state changes.

Change-Id: Ie46fc9113f752ed8989dab99301690a13003b00b
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-03 19:10:39 -07:00
Nilaan Gunabalachandran
1fedb0a712 disp: msm: sde: fix static cache programming
Add smmu cache hint at during the msm gem prime import
to ensure memory is cacheable. Ensure sys cache feature
is added to all sspp, not just vig.

Change-Id: Icc10468ad8d3e7c6aabd437776cde99eb627375a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-05-28 20:36:51 -04:00
Veera Sundaram Sankaran
68b75aac24 disp: msm: use FB_NON_SEC_DIR_TRANS plane hint for TUI VM buffers
Add plane buffer flag to get the correct aspace during
TUI VM usecase. FB_NON_SEC_DIR_TRANS plane flag is set
by user-mode to indicate S2-only non-secure buffer in
TUI VM. Return the default drm device when SMMU is not
available during get_aspace_device to make the working
seamless with/without SMMU.

Change-Id: I158dc17ba51ff4b2f302d3e7017db8ab3cfe2b84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:39 -07:00
Veera Sundaram Sankaran
bfec52ae7b disp: msm: sde: add SID setup function for pipes and lutdma
Add SID setup function to help programming
the SIDs for all the pipes and lutdma xin clients
based on the VM.

Change-Id: Iea598303b480b33de8750e0988129dd5cdfe7572
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:31 -07:00
Amine Najahi
89c7e1dadf disp: msm: sde: add plane staging management for 4LM topologies
When a 4LM topology is used each plane attached to a CRTC
is tagged with a L/R layout value and an offset value
depending on where destination X coordinate lands on the display.
The layout information is used to determine SSPP to LM
pair mapping and local coordinate space.

This change also handles source-split and Z-order
validation checks for planes staged on different mixer
pairs.

Change-Id: I1b20223388e65fc36a8b379ad9df23a277fcd1a5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-05 23:06:39 -04:00