提交線圖

118 次程式碼提交

作者 SHA1 備註 日期
Shirisha Kollapuram
0d6e7e269a disp: msm: sde: program the start window based on "EPT_FPS"
Introduce a new connector property called “EPT_FPS” for the cmd
mode panels. User space will set the “EPT_FPS” based on the
intended content fps, relative to the last retire fence timestamp
as calculated by Surface flinger. Program start window based
on the Expected Present Time fps.

Change-Id: I24b93e0f941af9fb2422b2484328254d04a1acbe
Signed-off-by: Shirisha Kollapuram <quic_kshirish@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-02-09 11:10:08 -08:00
Veera Sundaram Sankaran
2e3ba9430c disp: msm: expose qsync avr step as part of conn mode caps
Add capability to read avr step for each timing mode. This will
be in addition to the existing avr-step-list which is defined
when dfps is enabled. Expose the avr-step as part of each
mode in connector caps to user-mode.
Additionally, change the avr_step connector property to enum
to give usermode just the capability to enable/disable avr-step
and not alter the step value as its fixed from the device tree.

Change-Id: I6d7f8e9fcf03f98abef7640fc741e5e1be8597a1
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-02-09 11:10:08 -08:00
Shirisha Kollapuram
0a0dbc1220 disp: msm: sde: delay frame trigger to match with the EPT
Time the flush bit setting to match with the expected frame
rate. To achieve this, introduce a new connector property called
“Expected_Present_Time”. User space will set it based on the
intended content fps and AVR step, relative to the last retire
fence timestamp as calculated by user space. Delay the frame
trigger to match with the EPT.

Change-Id: I0b86caaa53ee2e37671167acdffd22ec62b4e9ae
Signed-off-by: Shirisha Kollapuram <quic_kshirish@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-01-26 10:25:04 -08:00
Sandeep Gangadharaiah
52a0b8ab86 disp: msm: sde: fix 3dmux bookkeeping during resource info check
Currently, num of 3dmux used is incremented or decremented based
on LM allotment. This was leading to wrong bookkeeping in few
corner cases. This change maintains a 3d mux mask to track the
usage and update the count accordingly.

Change-Id: Idf25eff827462f3f0263d01a1aa733a1cbaf0a83
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
2022-11-23 09:19:29 -08:00
Alisha Thapaliya
c2364bdd17 msm: drm: sde: Add support for UCSC via AHB programming
Add support for UCSC block parameters that includes unmult,
IGC/GC modes, CSC coefficients, and clamps.

Change-Id: I3ef4b729e9c973a98d53dc583233bf5e004035fa
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
2022-10-24 10:53:36 -07:00
qctecmdr
03f6a06942 Merge "disp: msm: sde: enable WB rotation feature for pineapple target" 2022-10-20 12:29:12 -07:00
Prabhanjan Kandula
c3991049c1 disp: msm: sde: add support for new QoS mode of WB rotation
This change adds support for new dynamic QoS mode for WB rotation
which is required to achieve rotation output available at required
rate to meet real time use case. Though traffic shaper can be
disabled in dynamic QoS mode, part of traffic shaper algo to track
WB operating speed is enabled and WB generates creq priority
based on current ouput rate compared to targetted ouput to help
meeting real time use case requirement.

Change-Id: I98c2dcae53f1b175dc49b40238b9da33e95717a6
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
2022-10-19 11:24:04 -07:00
Prabhanjan Kandula
4cca89d615 disp: msm: sde: add drm properties required for wb rotation
This change installs required drm properties for writeback
connector to implement rotation with writeback hw in mdss.

Change-Id: I85ed359d06ff4bafee85a4bfa5b8a99774311e60
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
2022-10-19 11:22:49 -07:00
Raviteja Tamatam
22a3c5a842 disp: msm: fix display compilation for 6.0 kernel upgrade
Fix display compilation issues for 6.0 kernel upgrade.

Change-Id: Ied1940e653ceaa1de18a8aedeab01197c235603c
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2022-10-19 11:04:22 -07:00
GG Hou
16839d2e8a disp: msm: include delay.h for udelay and usleep_range
This change includes linux/delay.h to import the udelay and
usleep_range APIs.

Change-Id: I6ed406cb0f83aebf682420a53b44da72d7ec0456
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-10-10 11:18:35 -07:00
GG Hou
398572ab21 disp: msm: rename dma-buf-map to iosys-map
The dma-buf-map struct has been renamed to iosys-map.
This change updates the usage of the struct and APIs in
the display driver.

Link: https://patchwork.freedesktop.org/patch/472236/

Change-Id: I5b48424dd5f8c60a28958a036ee2859963b059d2
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-10-10 11:07:55 -07:00
GG Hou
11f0929a72 disp: msm: dp: update include file path for upstream headers
This change updates the include file path for necessary dp
and dsc headers that have moved in upstream kernel.

File path changed in upstream:
include/drm/display/drm_dp_aux_bus.h
include/drm/display/drm_dp_dual_mode_helper.h
include/drm/display/drm_dp.h
include/drm/display/drm_dp_helper.h
include/drm/display/drm_dp_mst_helper.h
include/drm/display/drm_dsc.h
include/drm/display/drm_dsc_helper.h
include/drm/display/drm_hdcp.h
include/drm/display/drm_hdcp_helper.h
include/drm/display/drm_hdmi_helper.h
include/drm/display/drm_scdc.h
include/drm/display/drm_scdc_helper.h

Change-Id: Icb9a227c7464061f68fe60cbda6d93858fa768c5
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-10-10 11:06:29 -07:00
Jayaprakash Madisetty
182aac6040 disp: msm: cancel all delayed_works before triggering msm_lastclose
This patch cancels all the delayed_off_works if scheduled and flushes
the display threads for completion during msm_lastclose. The commit
from msm_lastclose client modeset to disable any crtcs if enabled is
always scheduled on primary crtc_commit thread. In the current issue,
delayed_off_work is scheduled on secondary display crtc_commit thread
and primary crtc_commit thread is scheduled to turn off active crtcs
from msm_lastclose leading to null dereference access of sde_enc's
cur_master. This race is avoided by serializing the operations in
msm_lastclose.

Change-Id: I30cc95b925c8134f0064816ebe2cfdb86a49fb36
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
2022-08-17 14:06:45 -07:00
Nilaan Gunabalachandran
eab3fd66db disp: msm: sde: convert ubwc stats roi into blob property
This change converts the ubwc stats roi into a blob property. This
allows for the roi data structure to be passed into kernel.

Change-Id: I4b30dcc16bcbd152428861444ff321add860942f
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-08-11 11:45:14 -07:00
Alex Danila
5ed42eb243 disp: msm: dp: address race condition in LM allocation
Addresses a race condition which could cause the RM to overcommiting LMs to
DP when multiple DP displays are used.

sde_rm_get_resource_info now uses the RM's mutex and assumes a null
encoder is not a built in display so that it can return an accurate
count of unreserved resources.

DP layer now maintains internal accounting of LMs in use to avoid
validating modes that have insufficient remaining resources.

Change-Id: I908c1597c1d651b6f9c9b74a34137f30087d8801
Signed-off-by: Alex Danila <quic_eadanila@quicinc.com>
2022-07-20 13:26:49 -04:00
Amine Najahi
bffdc0271d disp: msm: sde: add support for LLCC_DISP_1 SCID
Currently only LLCC_DISP SCID is used to read and write to
system cache during static display use case.

This changes adds SCID LLCC_DISP_1 to allow each SCID to
have a dedicated function (read/write).

Change-Id: I5604ec1183d99a8492b005ec06ac94e5db60b5f7
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
2022-04-26 10:29:29 -04:00
Rajesh kv
03aad2fdf9 disp: msm: sde: add line insertion support for sspp
Add line insertion support for sspp, this is used to support
display with external splitter. Line insertion logic checks
the difference between screen logical height and physical
height. If any difference is observed adds dummy and active
lines on screen.

Change-Id: Ieec322273df000a53fb39e05174c2d67c3c2da81
Signed-off-by: Rajesh kv <quic_kvrajesh@quicinc.com>
2022-04-01 09:35:03 +05:30
Nilaan Gunabalachandran
e5fcf7f263 disp: msm: add capability to dynamically update the transfer time
This change adds a connector OP, that will be used to update frame
transfer time dynamically at the request from user space.

It also adds parsing for new device tree entries that set the minimum
and maximum trasnfer times on a mode basis. These min and max transfer
times are also published to userspace through the connector mode info
capabilities blob.

Change-Id: I12aedf96a51ff7feb2c5b3b1353d3c4ec8dcb068
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2022-03-21 14:13:32 -04:00
Satya Rama Aditya Pinapala
718cd25496 disp: msm: add support for INTF WD jitter
Change adds support for the INTF watchdog timer jitter feature
for MDSS 9.x.

Change-Id: I2cf821b5b5724f9adee95c282e0ec09719489a85
Signed-off-by: Satya Rama Aditya Pinapala <quic_spinapal@quicinc.com>
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
2022-02-24 10:51:20 -08:00
GG Hou
dbf99b46c9 disp: msm: display error log signature alignment
Ensure SDE_ERROR error log print function name and line number.
Add a macro DISP_DEV_ERR as a wrapper of dev_err to ensure origin dev_err
will print function name and line number.
This would help with analysis of errors reported with automated testing.

Expected display error log format:
  [FUNCTION_NAME:line] ERROR_MESSAGE

Change-Id: I354f45b492059d5ba2bb110d56443fd338add7ad
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-02-23 17:53:49 +08:00
GG Hou
e29493c71d disp: msm: avoid using #ifdef for configurations
Use #if IS_ENABLED() instead of #ifdef for configurations as vendor module
guidelines.

Use #if IS_ENABLED(CONFIG_XXX) instead of #ifdef CONFIG_XXX to ensure that
the code inside the #if block continues to compile if the config changes
to a tristate config in the future.

The differences are as follows:
	1.#if IS_ENABLED(CONFIG_XXX) evaluates to true when CONFIG_XXX is set to
		module (=m) or built-in (=y).
	2.#ifdef CONFIG_XXX evaluates to true when CONFIG_XXX is set to
		built-in(=y) , but doesn't when CONFIG_XXX is set to module(=m).
		Use this only when you're certain you want to do the same thing
		when the config is set to module or is disabled.

Change-Id: Ia806b9b01ad8414d0e4de027a382cb68e7fb4a6a
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-01-17 10:10:04 +08:00
Veera Sundaram Sankaran
b7f241585a disp: msm: sde: add offline WB QoS support
Add support to parse and configure QoS values for offline writeback.
Expose a writeback connector property to allow user-mode to set
the usage type of the writeback block - WFD, CWB, offline-WB.

Change-Id: I864f79c4896ec757ac2d8b0f57a6a5775d164f21
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-01-05 17:16:12 -08:00
Jeykumar Sankaran
cf39b00660 Merge branch 'display-kernel.lnx.5.10' into display-kernel.lnx.1.0
Change-Id: I5d2b08380b6b0eb09492b950fb38cd9a0b3196c1
2021-12-08 12:37:35 -08:00
Veera Sundaram Sankaran
93ec98a33e disp: msm: sde: expose dnsc_blur connector properties
Add downscale blur connector properties to expose the hw block count,
downscaling filters used and the ratios supported. Add a custom dnsc_blur
property to allow usermode to send the required configuration to program
the hardware. Expose only for the virtual connector as the dnsc_blur is
only supported with writeback block.

Change-Id: I35dd263d9d5aafdb59bacbb3a0528ffd2bcaf6a3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:16 -08:00
Narendra Muppalla
7c5d715673 disp: msm: snapshot change for mdp driver to support multiple SIs
This change adds support in mdp and dsi driver to support
multiple SIS.

Change-Id: I432068cea17e1784d7570a472fbadaa86695df07
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-11-30 14:42:51 +08:00
Bruce Hoo
87c65e29e4 disp: msm: adapt msm_gem ops and drm_drver callbacks for multiple SIs
Commit d1d1173 ("disp: msm: update msm_gem ops and remove unused
drm_driver callbacks") Update msm_gem and msm_drv to comply with
latest 5.15 kernel.Modify dma_buf_vmap() and dma-buf's vmap callback
to use truct dma_buf_map. Rename dma_resv_get_excl_rcu to _unlocked.
Remove deprecated GEM and PRIME callbacks.
This change adapts all the interface change for kernel version 5.10
and version 5.15..

Change-Id: Icb495dc4e5d20999f773ed5881eff233ff3a48bc
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
2021-11-30 10:50:34 +08:00
Veera Sundaram Sankaran
7cb040c3a6 disp: msm: sde: add cache hints support in fb
Add a cache_flag in msm_fb object to store the system cache state hints.
Writeback connector will store cache write hints if system cache write
is enabled while HW is writing into this buffer. Plane in the primary
display path, in a 2-pass composition strategy will use this cache hints
to enable the display HW to use system cache for reading the pixel data
from this buffer.

Change-Id: Iff92a453a36d4a60b5a0162832eebd5e8739b5c3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-19 11:13:42 -08:00
Veera Sundaram Sankaran
993f61c91d disp: msm: sde: expose system cache support for writeback
Add a custom cache_enable property in writeback connector to allow
user-mode to control the cache setting on a frame basis. Configure
the hw and activate/deactivate the llcc based on the property. The
custom property is added based on the availability of the system
cache for writeback.

Change-Id: I812b31955eb36c75c33ac279b56502a13f7cdcbf
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-19 11:13:29 -08:00
Veera Sundaram Sankaran
762252400d disp: msm: sde: expose early-wb-fence option for 2-pass composition
Add a writeback connector property EARLY-FENCE-LINE to give usermode
the control on when to trigger the retire fence. This option is useful
in 2-pass composition, where the writeback triggers the retire-fence
early based on the prog-line which allows primary to start the fetch
before wb transaction is fully completed. This helps to keep the clks
and bw low. WB hardware generates the line-ptr-irq when wb output reaches
the configured prog-line. Retire fence is triggered based on the irq by
default and wb-done handles for cases where line-ptr-irq is missed.

Change-Id: I20867979693dc3447f77da24cd7e88305947fb6d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:56:03 -08:00
Yashwanth
a5382aff7e disp: msm: sde: deprecate idle notify work scheduling
This change deprecates idle notify work for video mode
since idle timer will be maintained by userspace.
As part of idle notify work, syscache state is changed from
CACHE_STATE_NORMAL to CACHE_STATE_PRE_CACHE along with
notifying to the userspace. This change removes
CACHE_STATE_PRE_CACHE in the state machine and state is
updated from CACHE_STATE_NORMAL to CACHE_STATE_FRAME_WRITE
whenever the cache property is set.

Change-Id: If3b2c34be954cb625aca76da81fd854c077a8250
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-11-11 11:07:54 +05:30
Steve Cohen
5fe7c2f8a0 disp: msm: remove gem functions without callsites
Many upstream files and APIs have been removed in downstream
driver. Some function definintions are left dangling without
any caller. Remove the functions which are not used downstream.

Change-Id: I9f936e7cdac3be6f854b3c67725164fad785f0d4
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Bruce Hoo
d1d11731f1 disp: msm: update msm_gem ops and remove unused drm_driver callbacks
Update msm_gem and msm_drv to comply with latest 5.15 kernel.
Modify dma_buf_vmap() and dma-buf's vmap callback to use
struct dma_buf_map. Rename dma_resv_get_excl_rcu to _unlocked.
Remove deprecated GEM and PRIME callbacks.

Change-Id: Ifdfc7f872c988d8455f465e7d17dfbcf212bb5f6
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-10-15 17:27:27 -07:00
Dhaval Patel
25c3b955c6 disp: msm: move thread priority call from component bind
Move thread priority call to kernel worker thread because
component bind API may run from vendor_modeprobe process
context when all drivers probe succeed. Thread priority
update is not allowed from vendor_modeprobe process
context.

Change-Id: Iafac97ce02942d6a2134495232f3c395ba4a362f
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-10-13 15:00:40 -07:00
Ping Li
629228c353 disp: msm: sde: add new support for digital dimming
Add new properties to support dynamically turning on and off digital
dimming and setting new minimum backlight.

Change-Id: I3b94190877d556768ba2c92ec59432dec44de0de
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-10-05 21:15:09 -07:00
Prabhanjan Kandula
d863e18638 disp: msm: sde: fix dsc initial line caluclation
Current DSC intial line calculation is giving extra line on top of
recommended value from systems since number of active soft slices
considered is wrong. Fix the number or usage of active soft slices
in an encoder to align dsc initial line with recommended setting.

Change-Id: I321260e22b7824b8c481a55b54831ce9535661cc
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-08-19 11:48:52 -07:00
qctecmdr
7986d0d1b1 Merge "disp: msm: dp: add support for 3.75:1 compression" 2021-08-13 08:58:26 -07:00
Rajkumar Subbiah
eebce2ae4c disp: msm: dp: add support for 3.75:1 compression
Currently the DP driver always uses a compression ratio of 3, if
DSC is enabled. So if the sink supports 30bpp, the compressed
output is set to 10bpp. But since the hardware supports
compressing this to 8bpp, it would require less link bandwidth
than 10bpp compressed output. For compliance testing, the
test equipment limits the link bandwidth based on the most
efficient compression ratio and for some resolutions there
is not enough link bandwidth for 3:1 compression.

This change always sets the compression output to 8bpp to
minimize the link bandwidth utilization.

Change-Id: Ifa6129444c2bab4e9c357ddfe49f76efa5b04be0
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2021-08-05 20:26:34 -04:00
Yashwanth
64b732f335 disp: msm: add qsync refresh rate support per mode
This change adds support for qsync min refresh rate per
timing mode and populates qsync min refresh rate based
on the current fps when qsync is enabled.

Change-Id: I191d1d72e95dd065c8c0b56a6100104c00c6d8f6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-08-05 15:37:20 +05:30
Amine Najahi
1881acdb2b disp: msm: dsi: publish RFI porch values for rate matching calculation
Currently when RFI is used on a video mode panel the horizontal or
vertical front porch values can be adjusted to maintain a constant FPS.
When this feature is enabled, driver is not propagating the new
htotal or vtotal values to usermode for accurate BW and MDP clock
calculation, which may lead to underrun in some usecase.

This change publishes beforehand all the RFI related timing
such as compensation type, hfp or vfp and clock values for
each mode for accurate BW and clock calculation.

Change-Id: Ib89c5e318fe978b0ae2215dedc430e057a9a81b9
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-07-29 10:35:27 -04:00
qctecmdr
1b9345b3af Merge "disp: msm: sde: add support for digital dimming" 2021-06-02 17:20:03 -07:00
qctecmdr
3f9b08b09e Merge "disp: msm: dsi: add parsing for RSC solver disable property" 2021-05-28 13:41:24 -07:00
Ping Li
9a17c5783b disp: msm: sde: add support for digital dimming
Add a new connector property to allow DC dimming feature to set
dimming backlight LUT. This change also adds a connector event
for client to register for backlight info needed for digital dimming
feature, including OS brightness, OS brightness_max, panel_backlight,
panel_backlight_max, and scale factors from ABA and LTM features.

Change-Id: I78f713fb2b965ca24effd973b4dfa9ff07a852f8
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-05-25 16:16:18 -07:00
Yashwanth
7e03fb61fd disp: msm: add support for seamless dsc switch
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.

Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:34:27 -07:00
Satya Rama Aditya Pinapala
134e62f655 disp: msm: dsi: add parsing for RSC solver disable property
For higher refresh, to provide higher transfer time we need to disable
RSC solver in MDP. This can be configured through the panel timing node
devicetree property. This change adds the parsing of the devicetree
property.

Change-Id: I9e708325da35086d2f955cbcc80bb164ccb116cd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-20 12:24:05 -07:00
Yu Wu
55340a43c3 disp: msm: add physical address info when dumping display registers
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.

Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
2021-05-06 02:59:16 -07:00
qctecmdr
1d8a30b659 Merge "disp: msm: sde: frame data feature" 2021-04-07 18:40:26 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
Steve Cohen
e5fa459062 disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode.
This change allows DSI panels to specify a single supported
step rate for each nominal fps rate which SDE will enforce
during atomic check of AVR parameters.

Change-Id: I049415449bc88ccd396fced16d4534251eac3a06
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:45:40 -04:00
Steve Cohen
cf86c94f8e disp: msm: sde: add support for AVR_STEP feature
Add AVR step support so SW can trigger a late frame and instead
of immediately triggering, HW will perform the update at the
start of the next step interval. This allows for a fixed SW
vsync timeline to be maintained in userland, eliminating the
usual drift from the actual HW vsync caused by a late frame.

This change adds AVR_STEP support via a DRM property.

Change-Id: I4cf8a296989805f134c2165a3bed0b050bb09c96
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:40:57 -04:00
qctecmdr
749c899317 Merge "disp: msm: add cwb dither support" 2021-04-02 20:58:22 -07:00