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3476 Commit-ok

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qctecmdr
302a160bae Merge "disp: msm: add feature-enabled check for output hw-fence sw-override" 2023-04-10 15:38:33 -07:00
qctecmdr
4f75aae022 Merge "disp: msm: sde: avoid skipping of encoder reset in cwb disable" 2023-04-10 15:38:33 -07:00
Varsha Suresh
36ba8cc716 msm: disp: Add bazel build support for display-drivers
-Add support to display-drivers modules using DDK framework for pineapple.
-Add macro that makes it easy to register new modules.

Change-Id: Id9cc0f367cff5b95b526fb42193471b3f3abd012
Signed-off-by: Varsha Suresh <quic_varssure@quicinc.com>
2023-04-06 18:07:03 -07:00
Prabhanjan Kandula
ba7b5c08cc disp: msm: sde: avoid skipping of encoder reset in cwb disable
During cwb disable, encoder reset should be invoked to clean up
and release hw resources. This encoder reset should happen even
if cwb encoder TX_DONE is not successful to avoid rm rsvp leak.

Change-Id: I81353f19b69cb68d71f7d5b6477e37b6dab3ae00
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
2023-04-05 19:10:10 -07:00
Christina Oliveira
85b87f5573 disp: msm: add feature-enabled check for output hw-fence sw-override
In the case that the hw-fence feature is enabled in the display driver dt
but disabled during initialization by the display driver when hw-fence
driver dependency is disabled, the existing check to determine
if the function pointer is available is not sufficient to determine
if the feature is enabled. This change adds an additional check to ensure
we do not set the output-fences sw-override unless hw-fencing is enabled.

Change-Id: I7f5000037e7b2a142224ef9c45b383e5c701350a
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2023-04-05 11:06:13 -07:00
qctecmdr
827af70599 Merge "disp: msm: sde: reset crop registers in PU cases" 2023-04-04 22:25:51 -07:00
Linux Build Service Account
65afd67e14 Merge "disp: msm: sde: Rename Gunyah RM APIs" into display-kernel.lnx.1.0 2023-04-04 22:11:39 -07:00
Shamika Joshi
eb2cae7569 disp: msm: sde: reset crop registers in PU cases
In back to back partial update cases with CWB the CROP
registers are not reset causing WB timeout in the
following sequence-
1) Nth commit WB_roi != LM_PU_roi, WB CROP registers
are programmed.
2) N+1th commit WB_roi == LM_PU_roi, WB CROP registers
are not cleared retaining old values.
Clear the WB CROP registers in the second case to fix
the issue.

Change-Id: If09a697f48ecaf5ee08d6313be444748d048b20d
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
2023-04-04 13:48:33 -07:00
qctecmdr
3049c6a494 Merge "disp: msm: dsi: Reset DMA trigger mux when initializing DSI_TRIG_CTRL" 2023-03-31 07:39:36 -07:00
Lakshmi Narayana Kalavala
2751ec018d drm: msm: skip re-marking color processing features as dirty
Current implementation we apply the color properties when atomic begin
is called and mark features as dirty if crtc is not enabled.
For some of the non double buffered features in video mode we will
see a corruption. Change removes marking color properties as dirty
based on crtc on/off.

Change-Id: I4d93b14627d2bc06fcbca3ea9538a4baedb00e56
Signed-off-by: Lakshmi Narayana Kalavala <quic_lkalaval@quicinc.com>
2023-03-28 18:09:49 -07:00
Prakruthi Deepak Heragu
09421907d8 disp: msm: sde: Rename Gunyah RM APIs
As we are merging upstream patches, resolve conflicts of namespaces in
downstream modules.

Change-Id: Id3af0de7102ddd92e312cb3cca10db9968974bcd
Signed-off-by: Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>
Signed-off-by: Raviteja Tamatam<quic_travitej@quicinc.com>
2023-03-27 15:54:11 -07:00
qctecmdr
5c4d0ad805 Merge "disp: msm: dp: do not skip wait for usb disconnect with dp_sim" 2023-03-24 17:59:42 -07:00
qctecmdr
c284dfbfeb Merge "disp: msm: dp: release vcpi slots for a modeset change for crtc state" 2023-03-24 17:59:42 -07:00
qctecmdr
d4f055f1fb Merge "disp: msm: restore dynamic bit clock front porches" 2023-03-24 07:26:43 -07:00
qctecmdr
c902459326 Merge "disp: msm: sde: use drm device for sec camera preview buffers" 2023-03-23 23:29:39 -07:00
Sankeerth Billakanti
c3cd13a34a disp: msm: dp: do not skip wait for usb disconnect with dp_sim
Wait for the userspace to disable DP when usb cable is removed
during DP simulation. The usb notifier is a blocking call.

Change-Id: I6c00cc684b4d99da30a129f034eb17bf505738bb
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
2023-03-23 14:35:17 -07:00
Kashish Jain
5aa0cba2a3 disp: msm: dsi: Reset DMA trigger mux when initializing DSI_TRIG_CTRL
When broadcast command is sent with command DMA window scheduling enabled,
DSI_TRIG_CTRL.COMMAND_MODE_DMA_TRG_MUX does not get reset after command
transfer. Due to this next unicast command on slave fails.
This change resets DMA trigger mux during DSI_TRIG_CTRL initialization.

Change-Id: I74503d82ab1cb6ca4d61a9d14f2b3cd2c3936ea7
Signed-off-by: Kashish Jain <quic_kashjain@quicinc.com>
2023-03-23 11:48:49 -07:00
Rajeev Nandan
2b15aded33 disp: msm: dsi: Fix DMA window scheduling programming
In DMA start window scheduling, TRIG_CTRL.COMMAND_MODE_DMA_TRIGGER_SEL
is programmed to SW + DMA start window trigger. But if DMS switch
comes after command is scheduled, COMMAND_MODE_DMA_TRIGGER_SEL gets
reprogrammed to SW trigger leading to command transfer failure.

Program the COMMAND_MODE_DMA_TRIGGER_SEL only from the CMD DMA Tx path.

Change-Id: I01062497bb70aa5fdcb25be3715c7cbc4c68b681
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
2023-03-23 18:29:00 +00:00
Soutrik Mukhopadhyay
32d257a5ab disp: msm: dp: release vcpi slots for a modeset change for crtc state
In MST atomic check function, allow to release vcpi slots for
any case of changes in modes, active state or connectors for a crtc state.
This reverts the commmit id 28cde80bd3666b6b339a21cac3d04b3b11c318b6.

Change-Id: Ice13790f2e652b336619e1d78b42ddb708b4cb2e
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
2023-03-23 08:39:23 -07:00
Veera Sundaram Sankaran
d873c81617 disp: msm: sde: use drm device for sec camera preview buffers
Attach the S2-only secure camera preview buffers with dummy drm
device during dma_buf_attach. This will ensure when sg_dma_address
will return the phys address for this buffer as its not backed
by a context-bank.

Change-Id: Iafd40352b92b842d19194976fa4b58e1e07e6f0d
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-03-22 15:15:19 -07:00
Yu Wu
567ad34910 disp: msm: restore dynamic bit clock front porches
Restore dynamic bit clock front porches.

Change-Id: If0edb93bd1200c1a2cba0d972770ab219be6e2a4
Signed-off-by: Yu Wu <quic_zwy@quicinc.com>
2023-03-22 16:51:43 +08:00
Rajkumar Subbiah
1cea6256c4 disp: msm: dp: fix mst slot allocation on disable
When a display is disabled, the mst slot payloads get updated in the
topology manager and also the start_slot for the remaining payloads
get adjusted, if necessary to start from 1. But the copy of these
values in dp_mst_drm context are getting readjusted properly. But
since the local context is used to update the slot configuration in
the dp controller, it is possible for the slot configuration in the
source and sink to mismatch causing blank output.

This change introduces a 2 pass solution while updating timeslots to
make sure the values in the bridge context reflect the values in
the topology manager.

Change-Id: Ia6f66e8d5ffcde3f25b1b2649733a547a06de995
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-20 13:27:05 -07:00
Rajkumar Subbiah
4effde5930 disp: msm: dp: check capability before enabling crc
This is a partial revert of I67ace5c064b2b56d03732a78f334ea6b1b649608 which tries
to enable Sink CRC irrespective of the sink's CRC capability to workaround an
issue with a specific sinks which reports incorrect capability on first plugin.
But this causes some MST dongles to misbehave causing one or both outputs to
be blank.

Change-Id: I70c70db8ac371fe0094a45780216a2518d688a36
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-20 16:13:09 -04:00
qctecmdr
3d940aa3e1 Merge "disp: msm: attach cp_pixel/tvm vmids to correct devices" 2023-03-17 16:46:19 -07:00
qctecmdr
8c1b88916f Merge "disp: msm: sde: update hw-fence txq wr_ptr from hardware" 2023-03-16 19:58:44 -07:00
Veera Sundaram Sankaran
4cc48c385e disp: msm: attach cp_pixel/tvm vmids to correct devices
Attach the dmabuf with cp-pixel vmid to secure-cb device and the
tvm vmid in HLOS to DRM device to support CSF 2.5. Some cases like
DEMURA has dmabuf set with both cp-pixel & tvm VMIDs as its used
in HLOS and shared with Trusted-vm. Attach to secure-cb device in
these cases.

Change-Id: I97f59cc01bb5ea18061541e68454b848f1a78a09
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-03-16 11:10:51 -07:00
qctecmdr
81e8aa8d56 Merge "disp: msm: sde: remove avr state check early return" 2023-03-16 10:55:17 -07:00
qctecmdr
61d495f49e Merge "disp: msm: sde: qos vote for all cpus during vm transition" 2023-03-16 10:55:17 -07:00
Christina Oliveira
b5cbfa8358 disp: msm: sde: update hw-fence txq wr_ptr from hardware
This change adds hardware programming that will update the
txq wr_ptr upon output fence firing.

Change-Id: I79ff0ea5fb2b7f73a48bd70e3c8e71ea69fead95
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
2023-03-15 12:53:37 -07:00
qctecmdr
280c38cc54 Merge "disp: msm: dp: check panel state before accessing dp audio registers" 2023-03-13 21:55:12 -07:00
qctecmdr
de9bb5b29c Merge "disp: msm: dp: skip crc read if pclk is not on" 2023-03-13 21:55:12 -07:00
qctecmdr
031728b5c6 Merge "disp: msm: dp: create dp aux log ipc context at probe time" 2023-03-13 21:55:12 -07:00
qctecmdr
a4e7d8b566 Merge "disp: msm: dp: force max bpp to 24 for MST" 2023-03-13 21:55:11 -07:00
Mahadevan
7c8a28d45f disp: msm: sde: qos vote for all cpus during vm transition
For a proxy-scheduled VCPU like the TUI VM, assignment to a
physical core is a runtime decision made by the HLOS scheduler,
and it may change frequently. pm_qos vote added by PVM for
specific CPUs won't be sufficient for addressing irq latency.
This change updates votes for all possible CPUs during TVM
entry and also removes the vote during exit.

Change-Id: Iab5cb5f57e2389ee57689ba2ab69394376f59788
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
2023-03-13 14:54:15 -07:00
Nilaan Gunabalachandran
d483cbe62a disp: msm: sde: remove avr state check early return
After introducing avr step state, the driver checks for avr
state none before returning early. In the case where avr property
is not being set, this leads to skipping qsync programming.

This change removes this state check.

Change-Id: Ie277dd04b8913358135210131a99c598cf2145ba
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2023-03-13 10:48:57 -07:00
qctecmdr
1ca5ff7768 Merge "disp: msm: sde: use vzalloc for large allocations" 2023-03-12 21:39:22 -07:00
qctecmdr
7e688d492e Merge "disp: msm: sde: avoid VMID_TVM check during buf import in trusted-vm" 2023-03-12 08:29:59 -07:00
qctecmdr
c6dd1a40a9 Merge "disp: msm: sde: silence ppb horizontal width check" 2023-03-10 13:40:48 -08:00
qctecmdr
ef29262a3d Merge "disp: msm: sde: use rate limited print for crtc event thread" 2023-03-10 13:40:48 -08:00
Veera Sundaram Sankaran
428a27027d disp: msm: sde: avoid VMID_TVM check during buf import in trusted-vm
Both trusted-vm and secure-camera preview buffers uses the same
VMID_TVM. In primary-vm, the check is used to determine the camera
preview usecase and attach it to the correct device. This is not
necessary for trusted-vm as it can default to nested trusted-vm
context bank. Avoid the check while its in trusted-vm.

Change-Id: I4391a4a1da9dca5d1f4b1719733b8d4edc1900a8
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-03-08 20:39:10 -08:00
Nisarg Bhavsar
65925ebbf0 disp: msm: dp: check panel state before accessing dp audio registers
During DP disable, it is possible for audio and display to race
causing the audio to send teardown notification after display driver
has disabled all the clocks. This change adds a check for panel state to
avoid accessing registers during this callback.

Change-Id: I6322726a04745bc6c73338cd33f65cfdbfe42ec7
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
2023-03-08 06:58:32 -08:00
Nisarg Bhavsar
1948a72655 disp: msm: dp: force max bpp to 24 for MST
Force max supported bpp to 24 to improve stability of MST usecases.

Change-Id: I5b0e6ad86df39915073f469ea67e6addea165965
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-07 19:12:44 -05:00
Rajkumar Subbiah
da304b72c6 disp: msm: dp: skip crc read if pclk is not on
The DP debugfs node for CRC read currently does not check
if the panel is enabled before attempting the read. This
could cause unclocked access of DP registers. This change
adds the necessary protection and bails out if the clocks
are not turned on.

Change-Id: Ia555e2473fc9f0f7434ee3665eb4fb7cfb4f97cf
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-06 21:16:01 -05:00
Rajkumar Subbiah
ae1ea3d993 disp: msm: dp: create dp aux log ipc context at probe time
Currently the ipc context for drm_dp_aux is being created
during dp_aux_init. This limits the IPC logs to be only
readable when the external display is in connected state
and it gets destroyed on unplug. This change moves the
context creation to probe time and the aux context will
be passed to the aux driver during initialization.

Change-Id: Id8d26c907c9cb2fd8c89b2842b98e7a908816abe
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-06 18:12:50 -08:00
Rajkumar Subbiah
23955331e6 disp: msm: dp: add marker to dp aux error logs
Some rate limited logs in dp aux and dp ctrl are using
pr_err_ratelimited function to print the logs instead of
the standard DP log macros. So this change adds a new
ratelimited DP log macro and make the logging consistent.

Change-Id: I75d7306d94c7c360783f39259c509c32fe59cdf5
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-03-06 18:10:54 -08:00
Nilaan Gunabalachandran
ecdf523387 disp: msm: sde: silence ppb horizontal width check
PPB size programming checks for the max horizontal width of the
panel by checking all available modes. In some DP usecases,
it is possible that this information is not ready at this point.
However, this is not an error, as by default driver will set the
maximum size.

This change reduces the error log to a debug warning.

Change-Id: Ieb63524457db410a2569682f2c3863e082c60805
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2023-03-06 14:00:19 -08:00
Gopikrishnaiah Anand
e556c1083f disp: msm: sde: Split demura config into two blobs
Some of the demura config parameters are single buffered. When demura
config is reprogrammed by user-space clients, single buffered updates
can cause artifacts on screen. Change splits the double buffered and
single buffered configs into different payloads to allow user-space
to update double buffered config.

Change-Id: I493b86944f7c2d630dcc1b863174e816cf8c82ed
Signed-off-by: Gopikrishnaiah Anand <quic_agopik@quicinc.com>
2023-03-05 02:31:33 -08:00
qctecmdr
c3622fa326 Merge "disp: msm: fix fence set on drm plane" 2023-03-04 10:59:38 -08:00
qctecmdr
c800377c04 Merge "disp: msm: sde: flush event thread work before vm transition" 2023-03-01 17:29:50 -08:00
Nilaan Gunabalachandran
68d3217032 disp: msm: sde: use rate limited print for crtc event thread
When the vblank event overflow error log occurs due to an inability
to handle incoming vblanks, it is posisble to continuously flood
with error print logs. This could cause the CPU to become further
blocked and creates a cycle of failed callbacks and error logging.

This change changes the overflow log in the crtc event thread to
rate limited.

Change-Id: Ie2d77689c8fa989cf3a294f973851b7dacef098b
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2023-03-01 16:22:58 -05:00