disp: msm: sde: delay frame trigger to match with the EPT
Time the flush bit setting to match with the expected frame rate. To achieve this, introduce a new connector property called “Expected_Present_Time”. User space will set it based on the intended content fps and AVR step, relative to the last retire fence timestamp as calculated by user space. Delay the frame trigger to match with the EPT. Change-Id: I0b86caaa53ee2e37671167acdffd22ec62b4e9ae Signed-off-by: Shirisha Kollapuram <quic_kshirish@quicinc.com> Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Šī revīzija ir iekļauta:

revīziju iesūtīja
Veera Sundaram Sankaran

vecāks
55e80bfcf7
revīzija
0a0dbc1220
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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@@ -247,6 +247,7 @@ enum msm_mdp_conn_property {
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CONNECTOR_PROP_CMD_FRAME_TRIGGER_MODE,
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CONNECTOR_PROP_SET_PANEL_MODE,
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CONNECTOR_PROP_AVR_STEP,
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CONNECTOR_PROP_EPT,
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CONNECTOR_PROP_CACHE_STATE,
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CONNECTOR_PROP_DSC_MODE,
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CONNECTOR_PROP_WB_USAGE_TYPE,
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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*/
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@@ -3175,6 +3175,10 @@ static int _sde_connector_install_properties(struct drm_device *dev,
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"qsync_mode", 0, 0, e_qsync_mode,
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ARRAY_SIZE(e_qsync_mode), 0,
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CONNECTOR_PROP_QSYNC_MODE);
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if (test_bit(SDE_FEATURE_EPT, sde_kms->catalog->features))
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msm_property_install_range(&c_conn->property_info,
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"EPT", 0x0, 0, U64_MAX, 0,
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CONNECTOR_PROP_EPT);
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if (test_bit(SDE_FEATURE_AVR_STEP, sde_kms->catalog->features))
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msm_property_install_range(&c_conn->property_info,
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"avr_step", 0x0, 0, U32_MAX, 0,
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@@ -1241,7 +1241,7 @@ static int _sde_encoder_atomic_check_qsync(struct sde_connector *sde_conn,
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{
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int rc = 0;
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u32 avr_step;
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bool qsync_dirty, has_modeset;
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bool qsync_dirty, has_modeset, ept;
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struct drm_connector_state *conn_state = &sde_conn_state->base;
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u32 qsync_mode = sde_connector_get_property(&sde_conn_state->base,
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CONNECTOR_PROP_QSYNC_MODE);
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@@ -1249,9 +1249,12 @@ static int _sde_encoder_atomic_check_qsync(struct sde_connector *sde_conn,
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has_modeset = sde_crtc_atomic_check_has_modeset(conn_state->state, conn_state->crtc);
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qsync_dirty = msm_property_is_dirty(&sde_conn->property_info,
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&sde_conn_state->property_state, CONNECTOR_PROP_QSYNC_MODE);
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ept = msm_property_is_dirty(&sde_conn->property_info,
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&sde_conn_state->property_state, CONNECTOR_PROP_EPT);
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if (has_modeset && qsync_dirty && (msm_is_mode_seamless_poms(&sde_conn_state->msm_mode) ||
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msm_is_mode_seamless_dyn_clk(&sde_conn_state->msm_mode))) {
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if (has_modeset && (qsync_dirty || ept) &&
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(msm_is_mode_seamless_poms(&sde_conn_state->msm_mode) ||
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msm_is_mode_seamless_dyn_clk(&sde_conn_state->msm_mode))) {
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SDE_ERROR("invalid qsync update during modeset priv flag:%x\n",
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sde_conn_state->msm_mode.private_flags);
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return -EINVAL;
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@@ -4642,6 +4645,56 @@ static int _sde_encoder_prepare_for_kickoff_processing(struct drm_encoder *drm_e
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return ret;
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}
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void _sde_encoder_delay_kickoff_processing(struct sde_encoder_virt *sde_enc)
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{
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ktime_t current_ts, ept_ts;
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u32 avr_step_fps, min_fps = 0, qsync_mode;
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u64 timeout_us = 0, ept;
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struct drm_connector *drm_conn;
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if (!sde_enc->cur_master || !sde_enc->cur_master->connector)
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return;
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drm_conn = sde_enc->cur_master->connector;
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ept = sde_connector_get_property(drm_conn->state, CONNECTOR_PROP_EPT);
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if (!ept)
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return;
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avr_step_fps = sde_connector_get_avr_step(drm_conn);
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qsync_mode = sde_connector_get_property(drm_conn->state, CONNECTOR_PROP_QSYNC_MODE);
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if (qsync_mode)
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_sde_encoder_get_qsync_fps_callback(&sde_enc->base, &min_fps, drm_conn->state);
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/* use min qsync fps, if feature is enabled; otherwise min default fps */
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min_fps = min_fps ? min_fps : DEFAULT_MIN_FPS;
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current_ts = ktime_get_ns();
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/* ept is in ns and avr_step is mulitple of refresh rate */
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ept_ts = avr_step_fps ? ept - DIV_ROUND_UP(NSEC_PER_SEC, avr_step_fps) + NSEC_PER_MSEC
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: ept - NSEC_PER_MSEC;
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/* ept time already elapsed */
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if (ept_ts <= current_ts) {
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SDE_DEBUG("enc:%d, ept elapsed; ept:%llu, ept_ts:%llu, current_ts:%llu\n",
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DRMID(&sde_enc->base), ept, ept_ts, current_ts);
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return;
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}
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timeout_us = DIV_ROUND_UP((ept_ts - current_ts), 1000);
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/* validate timeout is not beyond the min fps */
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if (timeout_us > DIV_ROUND_UP(USEC_PER_SEC, min_fps)) {
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SDE_ERROR("enc:%d, invalid timeout_us:%llu; ept:%llu, ept_ts:%llu, cur_ts:%llu\n",
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DRMID(&sde_enc->base), timeout_us, ept, ept_ts, current_ts);
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return;
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}
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SDE_ATRACE_BEGIN("schedule_timeout");
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usleep_range(timeout_us, timeout_us + 10);
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SDE_ATRACE_END("schedule_timeout");
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SDE_EVT32(DRMID(&sde_enc->base), qsync_mode, avr_step_fps, min_fps, ktime_to_us(current_ts),
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ktime_to_us(ept_ts), timeout_us);
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}
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int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc,
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struct sde_encoder_kickoff_params *params)
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{
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@@ -4715,6 +4768,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc,
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goto end;
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}
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_sde_encoder_delay_kickoff_processing(sde_enc);
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ret = _sde_encoder_prepare_for_kickoff_processing(drm_enc, params, sde_enc, sde_kms,
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needs_hw_reset, is_cmd_mode);
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@@ -59,6 +59,8 @@
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((!(phys_enc) || ((idx) < 0) || ((idx) >= INTR_IDX_MAX)) ? \
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0 : ((phys_enc)->irq[(idx)].irq_idx >= 0))
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#define DEFAULT_MIN_FPS 10
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/**
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* Encoder functions and data types
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* @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused
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@@ -767,6 +767,7 @@ enum {
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* @SDE_FEATURE_SUI_BLENDSTAGE SecureUI Blendstage supported
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* @SDE_FEATURE_SUI_NS_ALLOWED SecureUI allowed to access non-secure context banks
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* @SDE_FEATURE_TRUSTED_VM Trusted VM supported
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* @SDE_FEATURE_EPT Expected present time supported
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* @SDE_FEATURE_UBWC_STATS UBWC statistics supported
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* @SDE_FEATURE_VBIF_CLK_SPLIT VBIF clock split supported
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* @SDE_FEATURE_CTL_DONE Support for CTL DONE irq
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@@ -813,6 +814,7 @@ enum sde_mdss_features {
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SDE_FEATURE_SUI_BLENDSTAGE,
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SDE_FEATURE_SUI_NS_ALLOWED,
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SDE_FEATURE_TRUSTED_VM,
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SDE_FEATURE_EPT,
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SDE_FEATURE_UBWC_STATS,
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SDE_FEATURE_VBIF_CLK_SPLIT,
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SDE_FEATURE_CTL_DONE,
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