qcacmn: Fixes to enable LI & BE in a build

Changes to build Lithium and Beryllium together.
This is needed for WIN

Change-Id: I74c86803ea99fb17d1f73e8b9c4e7cf59751a707

dp/wifi3.0/be/dp_be.c

@@ -212,18 +212,19 @@ dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
 
 void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
 {
+#ifndef QCA_HOST_MODE_WIFI_DISABLED
 	arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
-	arch_ops->txrx_get_context_size = dp_get_context_size_be;
 	arch_ops->dp_rx_process = dp_rx_process_be;
-
+	arch_ops->tx_comp_get_params_from_hal_desc =
+		dp_tx_comp_get_params_from_hal_desc_be;
+#endif
+	arch_ops->txrx_get_context_size = dp_get_context_size_be;
 	arch_ops->txrx_soc_attach = dp_soc_attach_be;
 	arch_ops->txrx_soc_detach = dp_soc_detach_be;
 	arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
 	arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
 	arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
 	arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
-	arch_ops->tx_comp_get_params_from_hal_desc =
-		dp_tx_comp_get_params_from_hal_desc_be;
 	arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
 
 }

dp/wifi3.0/be/dp_be_rx.c

@@ -31,7 +31,6 @@
 #include "if_meta_hdr.h"
 #endif
 #include "dp_internal.h"
-#include "dp_rx_mon.h"
 #include "dp_ipa.h"
 #ifdef FEATURE_WDS
 #include "dp_txrx_wds.h"
@@ -222,7 +221,7 @@ more_data:
 			continue;
 		}
 
-		status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
+		status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
 		if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
 			DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
 			dp_info_rl("Nbuf sanity check failure!");
@@ -244,7 +243,7 @@ more_data:
 		hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
 
 		/* Get MSDU DESC info */
-		hal_rx_msdu_desc_info_get(hal_soc, ring_desc, &msdu_desc_info);
+		hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
 
 		if (qdf_unlikely(msdu_desc_info.msdu_flags &
 				 HAL_MSDU_F_MSDU_CONTINUATION)) {

dp/wifi3.0/dp_main.c

@@ -3238,7 +3238,8 @@ void dp_link_desc_ring_replenish(struct dp_soc *soc, uint32_t mac_id)
 			(count < total_link_descs)) {
 			page_idx = count / pages->num_element_per_page;
 			offset = count % pages->num_element_per_page;
-			cookie = LINK_DESC_COOKIE(count, page_idx);
+			cookie = LINK_DESC_COOKIE(count, page_idx,
+						  soc->link_desc_id_start);
 
 			hal_set_link_desc_addr(soc->hal_soc, desc, cookie,
 					       dma_pages[page_idx].page_p_addr
@@ -3266,7 +3267,8 @@ void dp_link_desc_ring_replenish(struct dp_soc *soc, uint32_t mac_id)
 		while (count < total_link_descs) {
 			page_idx = count / num_descs_per_page;
 			offset = count % num_descs_per_page;
-			cookie = LINK_DESC_COOKIE(count, page_idx);
+			cookie = LINK_DESC_COOKIE(count, page_idx,
+						  soc->link_desc_id_start);
 			hal_set_link_desc_addr(soc->hal_soc,
 					       (void *)scatter_buf_ptr,
 					       cookie,
@@ -4580,8 +4582,9 @@ dp_soc_tx_hw_desc_history_detach(struct dp_soc *soc)
  */
 static void dp_soc_rx_reinject_ring_history_attach(struct dp_soc *soc)
 {
-	soc->rx_reinject_ring_history = dp_context_alloc_mem(
-			soc, DP_RX_REINJECT_RING_HIST_TYPE, rx_ring_hist_size);
+	soc->rx_reinject_ring_history =
+		dp_context_alloc_mem(soc, DP_RX_REINJECT_RING_HIST_TYPE,
+				     sizeof(struct dp_rx_reinject_history));
 	if (soc->rx_reinject_ring_history)
 		qdf_atomic_init(&soc->rx_reinject_ring_history->index);
 }
@@ -4608,13 +4611,9 @@ static void dp_soc_rx_history_attach(struct dp_soc *soc)
 {
 	int i;
 	uint32_t rx_ring_hist_size;
-	uint32_t rx_err_ring_hist_size;
-	uint32_t rx_reinject_hist_size;
 	uint32_t rx_refill_ring_hist_size;
 
 	rx_ring_hist_size = sizeof(*soc->rx_ring_history[0]);
-	rx_err_ring_hist_size = sizeof(*soc->rx_err_ring_history);
-	rx_reinject_hist_size = sizeof(*soc->rx_reinject_ring_history);
 	rx_refill_ring_hist_size = sizeof(*soc->rx_refill_ring_history[0]);
 
 	for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
@@ -12687,6 +12686,21 @@ static inline void dp_soc_set_def_pdev(struct dp_soc *soc)
 	}
 }
 
+static uint32_t
+dp_get_link_desc_id_start(uint16_t arch_id)
+{
+	switch (arch_id) {
+	case LITHIUM_DP:
+		return LINK_DESC_ID_START_21_BITS_COOKIE;
+	case BERYLLIUM_DP:
+		return LINK_DESC_ID_START_20_BITS_COOKIE;
+	default:
+		dp_err("unkonwn arch_id 0x%x", arch_id);
+		QDF_BUG(0);
+		return LINK_DESC_ID_START_21_BITS_COOKIE;
+	}
+}
+
 /**
  * dp_soc_attach() - Attach txrx SOC
  * @ctrl_psoc: Opaque SOC handle from control plane
@@ -12706,18 +12720,18 @@ dp_soc_attach(struct cdp_ctrl_objmgr_psoc *ctrl_psoc,
 {
 	int int_ctx;
 	struct dp_soc *soc =  NULL;
+	uint16_t arch_id;
 
 	if (!hif_handle) {
 		dp_err("HIF handle is NULL");
 		goto fail0;
 	}
-
+	arch_id = cdp_get_arch_type_from_devid(device_id);
 	soc = qdf_mem_malloc(dp_get_soc_context_size(device_id));
 	if (!soc) {
 		dp_err("DP SOC memory allocation failed");
 		goto fail0;
 	}
-
 	dp_info("soc memory allocated %pk", soc);
 	soc->hif_handle = hif_handle;
 	soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
@@ -12734,6 +12748,9 @@ dp_soc_attach(struct cdp_ctrl_objmgr_psoc *ctrl_psoc,
 	hal_rx_get_tlv_size(soc->hal_soc, &soc->rx_pkt_tlv_size,
 			    &soc->rx_mon_pkt_tlv_size);
 
+	soc->arch_id = arch_id;
+	soc->link_desc_id_start =
+			dp_get_link_desc_id_start(soc->arch_id);
 	dp_configure_arch_ops(soc);
 
 	/* Reset wbm sg list and flags */

dp/wifi3.0/dp_reo.c

@@ -119,54 +119,15 @@ uint32_t dp_reo_status_ring_handler(struct dp_intr *int_ctx, struct dp_soc *soc)
 
 	while (reo_desc) {
 		uint16_t tlv = HAL_GET_TLV(reo_desc);
+		QDF_STATUS status;
+
 		processed_count++;
 
-		switch (tlv) {
-		case HAL_REO_QUEUE_STATS_STATUS_TLV:
-			hal_reo_queue_stats_status(reo_desc,
-					   &reo_status.queue_status,
-					   soc->hal_soc);
-			num = reo_status.queue_status.header.cmd_num;
-			break;
-		case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
-			hal_reo_flush_queue_status(reo_desc,
-						   &reo_status.fl_queue_status,
-						   soc->hal_soc);
-			num = reo_status.fl_queue_status.header.cmd_num;
-			break;
-		case HAL_REO_FLUSH_CACHE_STATUS_TLV:
-			hal_reo_flush_cache_status(reo_desc,
-						   &reo_status.fl_cache_status,
-						   soc->hal_soc);
-			num = reo_status.fl_cache_status.header.cmd_num;
-			break;
-		case HAL_REO_UNBLK_CACHE_STATUS_TLV:
-			hal_reo_unblock_cache_status(reo_desc, soc->hal_soc,
-						&reo_status.unblk_cache_status);
-			num = reo_status.unblk_cache_status.header.cmd_num;
-			break;
-		case HAL_REO_TIMOUT_LIST_STATUS_TLV:
-			hal_reo_flush_timeout_list_status(reo_desc,
-						&reo_status.fl_timeout_status,
-						soc->hal_soc);
-			num = reo_status.fl_timeout_status.header.cmd_num;
-			break;
-		case HAL_REO_DESC_THRES_STATUS_TLV:
-			hal_reo_desc_thres_reached_status(reo_desc,
-						&reo_status.thres_status,
-						soc->hal_soc);
-			num = reo_status.thres_status.header.cmd_num;
-			break;
-		case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
-			hal_reo_rx_update_queue_status(reo_desc,
-						&reo_status.rx_queue_status,
-						soc->hal_soc);
-			num = reo_status.rx_queue_status.header.cmd_num;
-			break;
-		default:
-			dp_reo_warn("%pK: no handler for TLV:%d", soc, tlv);
+		status = hal_reo_status_update(soc->hal_soc,
+					       reo_desc,
+					       &reo_status, tlv, &num);
+		if (status != QDF_STATUS_SUCCESS)
 			goto next;
-		} /* switch */
 
 		qdf_spin_lock_bh(&soc->rx.reo_cmd_lock);
 		TAILQ_FOREACH(reo_cmd, &soc->rx.reo_cmd_list,

dp/wifi3.0/dp_rx.c

@@ -708,7 +708,7 @@ void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
 	uint32_t bw;
 	uint8_t primary_chan_num;
 	uint32_t center_chan_freq;
-	struct dp_soc *soc;
+	struct dp_soc *soc = vdev->pdev->soc;
 
 	/* fill recv mesh stats */
 	rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
@@ -729,9 +729,10 @@ void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
 	if (qdf_nbuf_is_rx_chfrag_end(nbuf))
 		rx_info->rs_flags |= MESH_RX_LAST_MSDU;
 
-	if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
+	if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
 		rx_info->rs_flags |= MESH_RX_DECRYPTED;
-		rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
+		rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
+							  rx_tlv_hdr);
 		if (vdev->osif_get_key)
 			vdev->osif_get_key(vdev->osif_vdev,
 					&rx_info->rs_decryptkey[0],
@@ -743,8 +744,8 @@ void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
 	rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
 
 	soc = vdev->pdev->soc;
-	primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
-	center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
+	primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
+	center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
 
 	if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
 		rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
@@ -754,9 +755,9 @@ void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
 	}
 	rx_info->rs_channel = primary_chan_num;
 	pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
-	rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
-	bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
-	nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
+	rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
+	bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
+	nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
 	rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
 				(bw << 24);
 
@@ -1172,11 +1173,6 @@ void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
 
 	dp_rx_print_offload_info(soc, msdu);
 }
-#else
-static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
-				qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
-{
-}
 #endif /* RECEIVE_OFFLOAD */
 
 /**
@@ -1847,12 +1843,13 @@ int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  *
  * Return: NONE
  */
-QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
+QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
+					hal_ring_desc_t ring_desc,
 					struct dp_rx_desc *rx_desc)
 {
 	struct hal_buf_info hbi;
 
-	hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
+	hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
 	/* Sanity check for possible buffer paddr corruption */
 	if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
 		return QDF_STATUS_SUCCESS;
@@ -2100,7 +2097,7 @@ dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
 	if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
 		return;
 
-	hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
+	hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
 
 	/* buffer_addr_info is the first element of ring_desc */
 	hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,

dp/wifi3.0/dp_rx.h

@@ -1816,6 +1816,7 @@ static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
 void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
 			 qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
 #else
+static inline
 void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
 			 qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
 {
@@ -1873,11 +1874,13 @@ bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
 #endif
 
 #ifdef RX_DESC_DEBUG_CHECK
-QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
+QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
+					hal_ring_desc_t ring_desc,
 					struct dp_rx_desc *rx_desc);
 #else
 static inline
-QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
+QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
+					hal_ring_desc_t ring_desc,
 					struct dp_rx_desc *rx_desc)
 {
 	return QDF_STATUS_SUCCESS;

dp/wifi3.0/dp_rx_defrag.c

@@ -17,6 +17,11 @@
  */
 
 #include "hal_hw_headers.h"
+#ifndef RX_DEFRAG_DO_NOT_REINJECT
+#ifndef DP_BE_WAR
+#include "li/hal_li_rx.h"
+#endif
+#endif
 #include "dp_types.h"
 #include "dp_rx.h"
 #include "dp_peer.h"
@@ -1230,6 +1235,7 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 	struct dp_pdev *pdev = peer->vdev->pdev;
 	struct dp_soc *soc = pdev->soc;
 	struct hal_buf_info buf_info;
+	struct hal_buf_info temp_buf_info;
 	void *link_desc_va;
 	void *msdu0, *msdu_desc_info;
 	void *ent_ring_desc, *ent_mpdu_desc_info, *ent_qdesc_addr;
@@ -1273,7 +1279,7 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 		return QDF_STATUS_E_FAILURE;
 	}
 
-	hal_rx_reo_buf_paddr_get(dst_ring_desc, &buf_info);
+	hal_rx_reo_buf_paddr_get(soc->hal_soc, dst_ring_desc, &buf_info);
 
 	/* buffer_addr_info is the first element of ring_desc */
 	hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)dst_ring_desc,
@@ -1297,25 +1303,15 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 
 	qdf_mem_zero(msdu_desc_info, sizeof(struct rx_msdu_desc_info));
 
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			FIRST_MSDU_IN_MPDU_FLAG, 1);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			LAST_MSDU_IN_MPDU_FLAG, 1);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			MSDU_CONTINUATION, 0x0);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			REO_DESTINATION_INDICATION, dst_ind);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			MSDU_LENGTH, nbuf_len);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			SA_IS_VALID, 1);
-	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
-			DA_IS_VALID, 1);
+	hal_msdu_desc_info_set(soc->hal_soc, msdu_desc_info, dst_ind, nbuf_len);
 
 	/* change RX TLV's */
 	hal_rx_tlv_msdu_len_set(soc->hal_soc, qdf_nbuf_data(head), nbuf_len);
 
-	cookie = HAL_RX_BUF_COOKIE_GET(msdu0);
+	hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)msdu0,
+				  &temp_buf_info);
+
+	cookie = temp_buf_info.sw_cookie;
 	rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
 
 	/* map the nbuf before reinject it into HW */
@@ -1349,8 +1345,8 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 		return QDF_STATUS_E_FAILURE;
 	}
 
-	hal_rxdma_buff_addr_info_set(soc->hal_osc, msdu0, paddr, cookie,
-				     DP_DEFRAG_RBM);
+	hal_rxdma_buff_addr_info_set(soc->hal_soc, msdu0, paddr, cookie,
+				     DP_DEFRAG_RBM(soc->wbm_sw0_bm_id));
 
 	/* Lets fill entrance ring now !!! */
 	if (qdf_unlikely(hal_srng_access_start(soc->hal_soc, hal_srng))) {
@@ -1361,12 +1357,13 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 		return QDF_STATUS_E_FAILURE;
 	}
 
-	dp_rx_reinject_ring_record_entry(soc, paddr, cookie, DP_DEFRAG_RBM);
+	dp_rx_reinject_ring_record_entry(soc, paddr, cookie,
+					 DP_DEFRAG_RBM(soc->wbm_sw0_bm_id));
 	paddr = (uint64_t)buf_info.paddr;
 	/* buf addr */
 	hal_rxdma_buff_addr_info_set(soc->hal_soc, ent_ring_desc, paddr,
 				     buf_info.sw_cookie,
-				     HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST);
+				     HAL_RX_BUF_RBM_WBM_CHIP0_IDLE_DESC_LIST);
 	/* mpdu desc info */
 	ent_mpdu_desc_info = hal_ent_mpdu_desc_info(soc->hal_soc,
 						    ent_ring_desc);
@@ -1380,21 +1377,7 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
 	mpdu_wrd = (uint32_t *)dst_mpdu_desc_info;
 	seq_no = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_wrd);
 
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-			MSDU_COUNT, 0x1);
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-				  MPDU_SEQUENCE_NUMBER, seq_no);
-	/* unset frag bit */
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-			FRAGMENT_FLAG, 0x0);
-	/* set sa/da valid bits */
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-			SA_IS_VALID, 0x1);
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-			DA_IS_VALID, 0x1);
-	HAL_RX_MPDU_DESC_INFO_SET(ent_mpdu_desc_info,
-			RAW_MPDU, 0x0);
-
+	hal_mpdu_desc_info_set(soc->hal_soc, ent_mpdu_desc_info, seq_no);
 	/* qdesc addr */
 	ent_qdesc_addr = (uint8_t *)ent_ring_desc +
 		REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;

dp/wifi3.0/dp_rx_err.c

@@ -301,7 +301,7 @@ dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
 	struct buffer_addr_info cur_link_desc_addr_info = { 0 };
 	struct buffer_addr_info next_link_desc_addr_info = { 0 };
 
-	hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
+	hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
 
 	/* buffer_addr_info is the first element of ring_desc */
 	hal_rx_buf_cookie_rbm_get(soc->hal_soc,
@@ -1759,7 +1759,7 @@ dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
 		 * check for the magic number in the sw cookie
 		 */
 		qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
-							LINK_DESC_ID_START);
+					soc->link_desc_id_start);
 
 		status = dp_rx_link_cookie_check(ring_desc);
 		if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
@@ -1767,7 +1767,7 @@ dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
 			break;
 		}
 
-		hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
+		hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
 		link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
 		hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
 				     &num_msdus);
@@ -2799,7 +2799,7 @@ dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
 	union dp_rx_desc_list_elem_t *tail = NULL;
 	uint8_t pool_id;
 
-	hal_rx_reo_buf_paddr_get(hal_desc, &buf_info);
+	hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
 
 	if (!buf_info.paddr) {
 		DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);

dp/wifi3.0/dp_rx_mon.h

@@ -554,7 +554,7 @@ dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
 {
 	struct hal_rx_mon_dest_buf_info frame_info;
 	uint16_t tot_payload_len =
-			RX_MONITOR_BUFFER_SIZE - soc->rx_pkt_tlv_size;
+			RX_MONITOR_BUFFER_SIZE - dp_soc->rx_pkt_tlv_size;
 
 	if (msdu_info->msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION) {
 		/* First buffer of MSDU */
@@ -582,8 +582,10 @@ dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
 
 			frame_info.first_buffer = 1;
 			frame_info.last_buffer = 0;
-			hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
-							       &frame_info);
+			hal_rx_priv_info_set_in_tlv(dp_soc->hal_soc,
+						    rx_desc_tlv,
+						    (uint8_t *)&frame_info,
+						    sizeof(frame_info));
 		} else {
 			/*
 			 * Continuation Middle frame
@@ -602,8 +604,10 @@ dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
 
 			frame_info.first_buffer = 0;
 			frame_info.last_buffer = 0;
-			hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
-							       &frame_info);
+			hal_rx_priv_info_set_in_tlv(dp_soc->hal_soc,
+						    rx_desc_tlv,
+						    (uint8_t *)&frame_info,
+						    sizeof(frame_info));
 		}
 	} else {
 		/**
@@ -625,8 +629,10 @@ dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
 
 			frame_info.first_buffer = 0;
 			frame_info.last_buffer = 1;
-			hal_rx_mon_dest_set_buffer_info_to_tlv(rx_desc_tlv,
-							       &frame_info);
+			hal_rx_priv_info_set_in_tlv(dp_soc->hal_soc,
+						    rx_desc_tlv,
+						    (uint8_t *)&frame_info,
+						    sizeof(frame_info));
 		} else {
 			/* MSDU with single buffer */
 			*frag_len_p = msdu_info->msdu_len;
@@ -644,8 +650,10 @@ dp_rx_mon_parse_desc_buffer(struct dp_soc *dp_soc,
 
 			frame_info.first_buffer = 1;
 			frame_info.last_buffer = 1;
-			hal_rx_mon_dest_set_buffer_info_to_tlv(
-						rx_desc_tlv, &frame_info);
+			hal_rx_priv_info_set_in_tlv(dp_soc->hal_soc,
+						    rx_desc_tlv,
+						    (uint8_t *)&frame_info,
+						    sizeof(frame_info));
 		}
 		/* Reset bool after complete processing of MSDU */
 		*is_frag_p = false;
@@ -780,7 +788,8 @@ void dp_rx_mon_remove_raw_frame_fcs_len(struct dp_soc *soc,
 	/* Strip FCS_LEN for Raw frame */
 	addr = qdf_nbuf_get_frag_addr(*head_msdu, 0);
 	addr -= soc->rx_mon_pkt_tlv_size;
-	if (hal_rx_tlv_decap_format_get(addr) == HAL_HW_RX_DECAP_FORMAT_RAW) {
+	if (hal_rx_tlv_decap_format_get(soc->hal_soc, addr) ==
+		HAL_HW_RX_DECAP_FORMAT_RAW) {
 		qdf_nbuf_trim_add_frag_size(*tail_msdu,
 			qdf_nbuf_get_nr_frags(*tail_msdu) - 1,
 					-HAL_RX_FCS_LEN, 0);

dp/wifi3.0/dp_rx_mon_dest.c

@@ -60,7 +60,8 @@ dp_tx_capture_get_user_id(struct dp_pdev *dp_pdev, void *rx_desc_tlv)
 	if (dp_pdev->tx_capture_enabled
 	    != CDP_TX_ENH_CAPTURE_DISABLED)
 		dp_pdev->ppdu_info.rx_info.user_id =
-			HAL_RX_HW_DESC_MPDU_USER_ID(rx_desc_tlv);
+			hal_rx_hw_desc_mpdu_user_id(dp_pdev->soc->hal_soc,
+						    rx_desc_tlv);
 }
 #else
 static inline void
@@ -576,7 +577,9 @@ qdf_nbuf_t dp_rx_mon_frag_restitch_mpdu_from_msdus(struct dp_soc *soc,
 	dp_pdev->ppdu_info.rx_status.rs_fcs_err = rx_status->cdp_rs_fcs_err;
 
 	rx_desc = qdf_nbuf_get_frag_addr(head_msdu, 0) - rx_mon_tlv_size;
-	hal_rx_mon_dest_get_buffer_info_from_tlv(rx_desc, &buf_info);
+	hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_desc,
+				      (uint8_t *)&buf_info,
+				      sizeof(buf_info));
 
 	/* Easy case - The MSDU status indicates that this is a non-decapped
 	 * packet in RAW mode.
@@ -674,7 +677,7 @@ qdf_nbuf_t dp_rx_mon_frag_restitch_mpdu_from_msdus(struct dp_soc *soc,
 	 *  ------------------------------------------------------------
 	 */
 	pad_byte_pholder =
-		(RX_MONITOR_BUFFER_SIZE - RX_PKT_TLVS_LEN) - frag_size;
+		(RX_MONITOR_BUFFER_SIZE - soc->rx_pkt_tlv_size) - frag_size;
 	/* Construct destination address
 	 *  --------------------------------------------------------------
 	 * | RX_PKT_TLV | L2_HDR_PAD   |   Decap HDR   |      Payload     |
@@ -782,8 +785,9 @@ qdf_nbuf_t dp_rx_mon_frag_restitch_mpdu_from_msdus(struct dp_soc *soc,
 							   msdu_curr, rx_desc);
 
 			/* Read buffer info from stored data in tlvs */
-			hal_rx_mon_dest_get_buffer_info_from_tlv(rx_desc,
-								 &buf_info);
+			hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_desc,
+						      (uint8_t *)&buf_info,
+						      sizeof(buf_info));
 
 			frag_size = qdf_nbuf_get_frag_size_by_idx(msdu_curr,
 								  frags_iter);
@@ -800,7 +804,8 @@ qdf_nbuf_t dp_rx_mon_frag_restitch_mpdu_from_msdus(struct dp_soc *soc,
 			 * to accommodate amsdu pad byte
 			 */
 			pad_byte_pholder =
-				(RX_MONITOR_BUFFER_SIZE - RX_PKT_TLVS_LEN) - frag_size;
+				(RX_MONITOR_BUFFER_SIZE - soc->rx_pkt_tlv_size)
+				- frag_size;
 			/*
 			 * We will come here only only three condition:
 			 * 1. Msdu with single Buffer

dp/wifi3.0/dp_tx.h

@@ -677,6 +677,8 @@ dp_send_completion_to_pkt_capture(struct dp_soc *soc,
 {
 }
 #endif
+
+#ifndef QCA_HOST_MODE_WIFI_DISABLED
 #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
 /**
  * dp_tx_update_stats() - Update soc level tx stats
@@ -754,6 +756,7 @@ dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
 	dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
 }
 #endif
+#endif /* QCA_HOST_MODE_WIFI_DISABLED */
 
 #ifdef DP_TX_HW_DESC_HISTORY
 static inline void

dp/wifi3.0/dp_types.h

@@ -1572,8 +1572,6 @@ struct dp_soc {
 	/* OS device abstraction */
 	qdf_device_t osdev;
 
-	struct dp_arch_ops arch_ops;
-
 	/*cce disable*/
 	bool cce_disable;
 
@@ -1621,6 +1619,13 @@ struct dp_soc {
 	/* HAL SOC handle */
 	hal_soc_handle_t hal_soc;
 
+	/* rx monitor pkt tlv size */
+	uint16_t rx_mon_pkt_tlv_size;
+	/* rx pkt tlv size */
+	uint16_t rx_pkt_tlv_size;
+
+	struct dp_arch_ops arch_ops;
+
 	/* Device ID coming from Bus sub-system */
 	uint32_t device_id;
 
@@ -2010,10 +2015,11 @@ struct dp_soc {
 	/* BM id for first WBM2SW  ring */
 	uint32_t wbm_sw0_bm_id;
 
-	/* rx monitor pkt tlv size */
-	uint16_t rx_mon_pkt_tlv_size;
-	/* rx pkt tlv size */
-	uint16_t rx_pkt_tlv_size;
+	/* Store arch_id from device_id */
+	uint16_t arch_id;
+
+	/* link desc ID start per device type */
+	uint32_t link_desc_id_start;
 };
 
 #ifdef IPA_OFFLOAD
@@ -2068,19 +2074,20 @@ struct dp_ipa_resources {
 #ifdef MAX_ALLOC_PAGE_SIZE
 #define LINK_DESC_PAGE_ID_MASK  0x007FE0
 #define LINK_DESC_ID_SHIFT      5
-#define LINK_DESC_COOKIE(_desc_id, _page_id) \
-	((((_page_id) + LINK_DESC_ID_START) << LINK_DESC_ID_SHIFT) | (_desc_id))
+#define LINK_DESC_COOKIE(_desc_id, _page_id, _desc_id_start) \
+	((((_page_id) + (_desc_id_start)) << LINK_DESC_ID_SHIFT) | (_desc_id))
 #define LINK_DESC_COOKIE_PAGE_ID(_cookie) \
 	(((_cookie) & LINK_DESC_PAGE_ID_MASK) >> LINK_DESC_ID_SHIFT)
 #else
 #define LINK_DESC_PAGE_ID_MASK  0x7
 #define LINK_DESC_ID_SHIFT      3
-#define LINK_DESC_COOKIE(_desc_id, _page_id) \
-	((((_desc_id) + LINK_DESC_ID_START) << LINK_DESC_ID_SHIFT) | (_page_id))
+#define LINK_DESC_COOKIE(_desc_id, _page_id, _desc_id_start) \
+	((((_desc_id) + (_desc_id_start)) << LINK_DESC_ID_SHIFT) | (_page_id))
 #define LINK_DESC_COOKIE_PAGE_ID(_cookie) \
 	((_cookie) & LINK_DESC_PAGE_ID_MASK)
 #endif
-#define LINK_DESC_ID_START 0x8000
+#define LINK_DESC_ID_START_21_BITS_COOKIE 0x8000
+#define LINK_DESC_ID_START_20_BITS_COOKIE 0x4000
 
 /* same as ieee80211_nac_param */
 enum dp_nac_param_cmd {

dp/wifi3.0/li/dp_li.c

@@ -247,7 +247,12 @@ dp_rxdma_ring_sel_cfg_li(struct dp_soc *soc)
 
 void dp_initialize_arch_ops_li(struct dp_arch_ops *arch_ops)
 {
+#ifndef QCA_HOST_MODE_WIFI_DISABLED
 	arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_li;
+	arch_ops->dp_rx_process = dp_rx_process_li;
+	arch_ops->tx_comp_get_params_from_hal_desc =
+		dp_tx_comp_get_params_from_hal_desc_li;
+#endif
 	arch_ops->txrx_get_context_size = dp_get_context_size_li;
 	arch_ops->txrx_soc_attach = dp_soc_attach_li;
 	arch_ops->txrx_soc_detach = dp_soc_detach_li;
@@ -255,8 +260,5 @@ void dp_initialize_arch_ops_li(struct dp_arch_ops *arch_ops)
 	arch_ops->txrx_pdev_detach = dp_pdev_detach_li;
 	arch_ops->txrx_vdev_attach = dp_vdev_attach_li;
 	arch_ops->txrx_vdev_detach = dp_vdev_detach_li;
-	arch_ops->tx_comp_get_params_from_hal_desc =
-		dp_tx_comp_get_params_from_hal_desc_li;
-	arch_ops->dp_rx_process = dp_rx_process_li;
 	arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_li;
 }

dp/wifi3.0/li/dp_li_rx.c

@@ -232,7 +232,7 @@ more_data:
 			continue;
 		}
 
-		status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
+		status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
 		if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
 			DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
 			dp_info_rl("Nbuf sanity check failure!");
@@ -254,7 +254,7 @@ more_data:
 		hal_rx_mpdu_desc_info_get_li(ring_desc, &mpdu_desc_info);
 
 		/* Get MSDU DESC info */
-		hal_rx_msdu_desc_info_get(hal_soc, ring_desc, &msdu_desc_info);
+		hal_rx_msdu_desc_info_get_li(ring_desc, &msdu_desc_info);
 
 		if (qdf_unlikely(msdu_desc_info.msdu_flags &
 				 HAL_MSDU_F_MSDU_CONTINUATION)) {

hal/wifi3.0/be/hal_be_api.h

@@ -86,7 +86,6 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc);
 uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc);
 uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc);
 void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1);
-void hal_rx_mpdu_desc_info_get_be(void *desc_addr, void *mpdu_desc_info);
 
 /**
  * hal_reo_qdesc_setup - Setup HW REO queue descriptor

hal/wifi3.0/be/hal_be_generic_api.c

@@ -16,6 +16,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
+#include <qdf_module.h>
 #include "hal_be_api.h"
 #include "hal_be_hw_headers.h"
 #include "hal_be_reo.h"
@@ -155,6 +156,33 @@ void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
 			   cookie);
 }
 
+static uint32_t hal_get_reo_qdesc_size_be(uint32_t ba_window_size, int tid)
+{
+	/* Return descriptor size corresponding to window size of 2 since
+	 * we set ba_window_size to 2 while setting up REO descriptors as
+	 * a WAR to get 2k jump exception aggregates are received without
+	 * a BA session.
+	 */
+	if (ba_window_size <= 1) {
+		if (tid != HAL_NON_QOS_TID)
+			return sizeof(struct rx_reo_queue) +
+				sizeof(struct rx_reo_queue_ext);
+		else
+			return sizeof(struct rx_reo_queue);
+	}
+
+	if (ba_window_size <= 105)
+		return sizeof(struct rx_reo_queue) +
+			sizeof(struct rx_reo_queue_ext);
+
+	if (ba_window_size <= 210)
+		return sizeof(struct rx_reo_queue) +
+			(2 * sizeof(struct rx_reo_queue_ext));
+
+	return sizeof(struct rx_reo_queue) +
+		(3 * sizeof(struct rx_reo_queue_ext));
+}
+
 void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr)
 {
 	return HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr);
@@ -444,6 +472,63 @@ void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1)
 	wbm_er_info->rxdma_err_code = HAL_RX_WBM_RXDMA_ERROR_CODE_GET(wbm_desc);
 }
 
+static void hal_rx_reo_buf_paddr_get_be(hal_ring_desc_t rx_desc,
+					struct hal_buf_info *buf_info)
+{
+	struct reo_destination_ring *reo_ring =
+		 (struct reo_destination_ring *)rx_desc;
+
+	buf_info->paddr =
+	 (HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_ring) |
+	  ((uint64_t)(HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_ring)) << 32));
+	buf_info->sw_cookie = HAL_RX_REO_BUF_COOKIE_GET(reo_ring);
+}
+
+static void hal_rx_msdu_link_desc_set_be(hal_soc_handle_t hal_soc_hdl,
+					 void *src_srng_desc,
+					 hal_buff_addrinfo_t buf_addr_info,
+					 uint8_t bm_action)
+{
+	/*
+	 * The offsets for fields used in this function are same in
+	 * wbm_release_ring for Lithium and wbm_release_ring_tx
+	 * for Beryllium. hence we can use wbm_release_ring directly.
+	 */
+	struct wbm_release_ring *wbm_rel_srng =
+			(struct wbm_release_ring *)src_srng_desc;
+	uint32_t addr_31_0;
+	uint8_t addr_39_32;
+
+	/* Structure copy !!! */
+	wbm_rel_srng->released_buff_or_desc_addr_info =
+				*((struct buffer_addr_info *)buf_addr_info);
+
+	addr_31_0 =
+	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_31_0;
+	addr_39_32 =
+	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_39_32;
+
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
+			   RELEASE_SOURCE_MODULE, HAL_RX_WBM_ERR_SRC_SW);
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING, BM_ACTION,
+			   bm_action);
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
+			   BUFFER_OR_DESC_TYPE,
+			   HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC);
+
+	/* WBM error is indicated when any of the link descriptors given to
+	 * WBM has a NULL address, and one those paths is the link descriptors
+	 * released from host after processing RXDMA errors,
+	 * or from Rx defrag path, and we want to add an assert here to ensure
+	 * host is not releasing descriptors with NULL address.
+	 */
+
+	if (qdf_unlikely(!addr_31_0 && !addr_39_32)) {
+		hal_dump_wbm_rel_desc(src_srng_desc);
+		qdf_assert_always(0);
+	}
+}
+
 /**
  * hal_rx_reo_ent_buf_paddr_get_be: Gets the physical address and
  * cookie from the REO entrance ring element
@@ -455,7 +540,7 @@ void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1)
  * Return: void
  */
 static
-void hal_rx_buf_cookie_rbm_get_be(hal_buff_addrinfo_t buf_addr_info_hdl,
+void hal_rx_buf_cookie_rbm_get_be(uint32_t *buf_addr_info_hdl,
 				  hal_buf_info_t buf_info_hdl)
 {
 	struct hal_buf_info *buf_info =
@@ -495,41 +580,6 @@ hal_rxdma_buff_addr_info_set_be(void *rxdma_entry,
 	HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
 }
 
-/**
- * hal_rx_msdu_flags_get_be() - Get msdu flags from ring desc
- * @msdu_desc_info_hdl: msdu desc info handle
- *
- * Return: msdu flags
- */
-static uint32_t hal_rx_msdu_flags_get_be(rx_msdu_desc_info_t msdu_desc_info_hdl)
-{
-	struct rx_msdu_desc_info *msdu_desc_info =
-		(struct rx_msdu_desc_info *)msdu_desc_info_hdl;
-	uint32_t flags = 0;
-
-// SA_IDX_TIMEOUT and DA_IDX_TIMEOUT is not present in hamilton
-// DA_IDX_TIMEOUT and DA_IDX_TIMEOUT is not present in hamilton
-	if (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_FIRST_MSDU_IN_MPDU;
-
-	if (HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_LAST_MSDU_IN_MPDU;
-
-	if (HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_MSDU_CONTINUATION;
-
-	if (HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_SA_IS_VALID;
-
-	if (HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_DA_IS_VALID;
-
-	if (HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_DA_IS_MCBC;
-
-	return flags;
-}
-
 /**
  * hal_rx_get_reo_error_code_be() - Get REO error code from ring desc
  * @rx_desc: rx descriptor
@@ -584,28 +634,74 @@ hal_gen_reo_remap_val_generic_be(enum hal_reo_remap_reg remap_reg,
 	return ix_val;
 }
 
-void hal_rx_mpdu_desc_info_get_be(void *desc_addr,
-				  void *mpdu_desc_info_hdl)
+static uint8_t hal_rx_err_status_get_be(hal_ring_desc_t rx_desc)
 {
-	struct reo_destination_ring *reo_dst_ring;
-	struct hal_rx_mpdu_desc_info *mpdu_desc_info =
-		(struct hal_rx_mpdu_desc_info *)mpdu_desc_info_hdl;
-	uint32_t *mpdu_info;
+	return HAL_RX_ERROR_STATUS_GET(rx_desc);
+}
 
-	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
+static QDF_STATUS hal_reo_status_update_be(hal_soc_handle_t hal_soc_hdl,
+					   hal_ring_desc_t reo_desc,
+					   void *st_handle,
+					   uint32_t tlv, int *num_ref)
+{
+	union hal_reo_status *reo_status_ref;
 
-	mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
+	reo_status_ref = (union hal_reo_status *)st_handle;
 
-	mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
-	mpdu_desc_info->mpdu_flags = hal_rx_get_mpdu_flags(mpdu_info);
-	mpdu_desc_info->peer_meta_data =
-		HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);
-	mpdu_desc_info->bar_frame = HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info);
-}
+	switch (tlv) {
+	case HAL_REO_QUEUE_STATS_STATUS_TLV:
+		hal_reo_queue_stats_status_be(reo_desc,
+					      &reo_status_ref->queue_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->queue_status.header.cmd_num;
+		break;
+	case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
+		hal_reo_flush_queue_status_be(reo_desc,
+					      &reo_status_ref->fl_queue_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_queue_status.header.cmd_num;
+		break;
+	case HAL_REO_FLUSH_CACHE_STATUS_TLV:
+		hal_reo_flush_cache_status_be(reo_desc,
+					      &reo_status_ref->fl_cache_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_cache_status.header.cmd_num;
+		break;
+	case HAL_REO_UNBLK_CACHE_STATUS_TLV:
+		hal_reo_unblock_cache_status_be
+			(reo_desc, hal_soc_hdl,
+			 &reo_status_ref->unblk_cache_status);
+		*num_ref = reo_status_ref->unblk_cache_status.header.cmd_num;
+		break;
+	case HAL_REO_TIMOUT_LIST_STATUS_TLV:
+		hal_reo_flush_timeout_list_status_be(
+					reo_desc,
+					&reo_status_ref->fl_timeout_status,
+					hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_timeout_status.header.cmd_num;
+		break;
+	case HAL_REO_DESC_THRES_STATUS_TLV:
+		hal_reo_desc_thres_reached_status_be(
+						reo_desc,
+						&reo_status_ref->thres_status,
+						hal_soc_hdl);
+		*num_ref = reo_status_ref->thres_status.header.cmd_num;
+		break;
+	case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
+		hal_reo_rx_update_queue_status_be(
+					reo_desc,
+					&reo_status_ref->rx_queue_status,
+					hal_soc_hdl);
+		*num_ref = reo_status_ref->rx_queue_status.header.cmd_num;
+		break;
+	default:
+		QDF_TRACE(QDF_MODULE_ID_DP_REO, QDF_TRACE_LEVEL_WARN,
+			  "hal_soc %pK: no handler for TLV:%d",
+			   hal_soc_hdl, tlv);
+		return QDF_STATUS_E_FAILURE;
+	} /* switch */
 
-static uint8_t hal_rx_err_status_get_be(hal_ring_desc_t rx_desc)
-{
-	return HAL_RX_ERROR_STATUS_GET(rx_desc);
+	return QDF_STATUS_SUCCESS;
 }
 
 static uint8_t hal_rx_reo_buf_type_get_be(hal_ring_desc_t rx_desc)
@@ -622,6 +718,7 @@ static uint8_t hal_rx_reo_buf_type_get_be(hal_ring_desc_t rx_desc)
  */
 void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
 {
+	hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_be;
 	hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_be;
 	hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_be;
 	hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_be;
@@ -631,7 +728,10 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
 	hal_soc->ops->hal_setup_link_idle_list =
 				hal_setup_link_idle_list_generic_be;
 
+	hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_be;
+	hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_be;
 	hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_be;
+
 	hal_soc->ops->hal_rx_ret_buf_manager_get =
 						hal_rx_ret_buf_manager_get_be;
 	hal_soc->ops->hal_rxdma_buff_addr_info_set =
@@ -648,19 +748,7 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
 	hal_soc->ops->hal_rx_reo_buf_type_get = hal_rx_reo_buf_type_get_be;
 	hal_soc->ops->hal_rx_wbm_err_src_get = hal_rx_wbm_err_src_get_be;
 	hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_be;
-	hal_soc->ops->hal_reo_queue_stats_status =
-						hal_reo_queue_stats_status_be;
-	hal_soc->ops->hal_reo_flush_queue_status =
-						hal_reo_flush_queue_status_be;
-	hal_soc->ops->hal_reo_flush_cache_status =
-						hal_reo_flush_cache_status_be;
-	hal_soc->ops->hal_reo_unblock_cache_status =
-						hal_reo_unblock_cache_status_be;
-	hal_soc->ops->hal_reo_flush_timeout_list_status =
-					hal_reo_flush_timeout_list_status_be;
-	hal_soc->ops->hal_reo_desc_thres_reached_status =
-					hal_reo_desc_thres_reached_status_be;
-	hal_soc->ops->hal_reo_rx_update_queue_status =
-					hal_reo_rx_update_queue_status_be;
 	hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_be;
+	hal_soc->ops->hal_reo_status_update = hal_reo_status_update_be;
+	hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_be;
 }

hal/wifi3.0/be/hal_be_generic_api.h

@@ -21,6 +21,7 @@
 
 #include <hal_be_hw_headers.h>
 #include "hal_be_tx.h"
+#include "hal_be_reo.h"
 
 /**
  * hal_tx_comp_get_status() - TQM Release reason

hal/wifi3.0/be/hal_be_hw_headers.h

@@ -19,6 +19,7 @@
 #ifndef _HAL_BE_HW_INTERNAL_H_
 #define _HAL_BE_HW_INTERNAL_H_
 
+#include "hal_hw_headers.h"
 #include "wcss_seq_hwioreg_umac.h"
 #include "phyrx_location.h"
 #include "receive_rssi_info.h"
@@ -30,6 +31,8 @@
 #if defined(QCA_WIFI_WCN7850)
 #include "msmhwioreg.h"
 #endif
+#include <reo_descriptor_threshold_reached_status.h>
+#include <reo_flush_queue.h>
 
 #define HAL_DESC_64_SET_FIELD(_desc, _word, _fld, _value) do { \
 	((uint64_t *)(_desc))[(_word ## _ ## _fld ## _OFFSET) >> 3] &= \

hal/wifi3.0/be/hal_be_reo.c

@@ -193,7 +193,8 @@ void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl, int tid,
 			   UNIFORM_DESCRIPTOR_HEADER, RESERVED_0A,
 			   0xCDBEEF);
 }
-qdf_export_symbol(hal_reo_qdesc_setup);
+
+qdf_export_symbol(hal_reo_qdesc_setup_be);
 
 /**
  * hal_get_ba_aging_timeout_be - Get BA Aging timeout
@@ -1356,3 +1357,8 @@ hal_reo_rx_update_queue_status_be(hal_ring_desc_t ring_desc,
 				  HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV,
 				  &(st->header), hal_soc);
 }
+
+uint8_t hal_get_tlv_hdr_size_be(void)
+{
+	return sizeof(struct tlv_32_hdr);
+}

hal/wifi3.0/be/hal_be_reo.h

@@ -75,4 +75,5 @@ hal_reo_rx_update_queue_status_be(hal_ring_desc_t ring_desc,
  */
 void hal_reo_init_cmd_ring_be(hal_soc_handle_t hal_soc_hdl,
 			      hal_ring_handle_t hal_ring_hdl);
+uint8_t hal_get_tlv_hdr_size_be(void);
 #endif /* _HAL_REO_BE_H_ */

hal/wifi3.0/be/hal_be_rx.h

@@ -180,6 +180,11 @@
 	HAL_RX_FLD_SET(_mpdu_info_ptr, RX_MPDU_DESC_INFO,		\
 			_field, _val)
 
+#define HAL_RX_REO_MSDU_REO_DST_IND_GET(reo_desc)	\
+	(HAL_RX_MSDU_REO_DST_IND_GET(&		\
+	(((struct reo_destination_ring *)	\
+	   reo_desc)->rx_msdu_desc_info_details)))
+
 /**
  * enum hal_be_rx_wbm_error_source: Indicates which module initiated the
  * release of this buffer or descriptor
@@ -240,33 +245,6 @@ static inline uint32_t hal_rx_get_mpdu_flags(uint32_t *mpdu_info)
  * RX REO ERROR APIS
  ******************************************************************************/
 
-/**
- * hal_rx_msdu_reo_dst_ind_get: Gets the REO
- * destination ring ID from the msdu desc info
- *
- * @msdu_link_desc : Opaque cookie pointer used by HAL to get to
- * the current descriptor
- *
- * Return: dst_ind (REO destination ring ID)
- */
-static inline uint32_t
-hal_rx_msdu_reo_dst_ind_get(hal_soc_handle_t hal_soc_hdl, void *msdu_link_desc)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-	struct rx_msdu_details *msdu_details;
-	struct rx_msdu_desc_info *msdu_desc_info;
-	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
-	uint32_t dst_ind;
-
-	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
-
-	/* The first msdu in the link should exsist */
-	msdu_desc_info = hal_rx_msdu_ext_desc_info_get_ptr(&msdu_details[0],
-							   hal_soc);
-	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
-	return dst_ind;
-}
-
 #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
 		(REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \
 		REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_MASK) >> \
@@ -317,4 +295,85 @@ hal_rx_msdu_link_desc_reinject(struct hal_soc *soc, uint64_t pa,
 	HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \
 	wbm_desc)->released_buff_or_desc_addr_info)
 
+/**
+ * hal_rx_msdu_flags_get_be() - Get msdu flags from ring desc
+ * @msdu_desc_info_hdl: msdu desc info handle
+ *
+ * Return: msdu flags
+ */
+static inline
+uint32_t hal_rx_msdu_flags_get_be(rx_msdu_desc_info_t msdu_desc_info_hdl)
+{
+	struct rx_msdu_desc_info *msdu_desc_info =
+		(struct rx_msdu_desc_info *)msdu_desc_info_hdl;
+	uint32_t flags = 0;
+
+	if (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_FIRST_MSDU_IN_MPDU;
+
+	if (HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_LAST_MSDU_IN_MPDU;
+
+	if (HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_MSDU_CONTINUATION;
+
+	if (HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_SA_IS_VALID;
+
+	if (HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_DA_IS_VALID;
+
+	if (HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_desc_info))
+		flags |= HAL_MSDU_F_DA_IS_MCBC;
+
+	return flags;
+}
+
+static inline
+void hal_rx_mpdu_desc_info_get_be(void *desc_addr,
+				  void *mpdu_desc_info_hdl)
+{
+	struct reo_destination_ring *reo_dst_ring;
+	struct hal_rx_mpdu_desc_info *mpdu_desc_info =
+		(struct hal_rx_mpdu_desc_info *)mpdu_desc_info_hdl;
+	uint32_t *mpdu_info;
+
+	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
+
+	mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
+
+	mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
+	mpdu_desc_info->mpdu_flags = hal_rx_get_mpdu_flags(mpdu_info);
+	mpdu_desc_info->peer_meta_data =
+		HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);
+	mpdu_desc_info->bar_frame = HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info);
+}
+
+/*
+ *hal_rx_msdu_desc_info_get_be: Gets the flags related to MSDU descriptor.
+ *@desc_addr: REO ring descriptor addr
+ *@msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
+ *
+ * Specifically flags needed are: first_msdu_in_mpdu,
+ * last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
+ * sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
+ *
+
+ *Return: void
+ */
+static inline void
+hal_rx_msdu_desc_info_get_be(void *desc_addr,
+			     struct hal_rx_msdu_desc_info *msdu_desc_info)
+{
+	struct reo_destination_ring *reo_dst_ring;
+	uint32_t *msdu_info;
+
+	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
+
+	msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
+	msdu_desc_info->msdu_flags =
+		hal_rx_msdu_flags_get_be((struct rx_msdu_desc_info *)msdu_info);
+	msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
+}
+
 #endif /* _HAL_BE_RX_H_ */

hal/wifi3.0/be/hal_be_rx_tlv.h

@@ -19,6 +19,8 @@
 #ifndef _HAL_BE_RX_TLV_H_
 #define _HAL_BE_RX_TLV_H_
 
+#include "hal_api_mon.h"
+
 /*
  * Structures & Macros to obtain fields from the TLV's in the Rx packet
  * pre-header.
@@ -27,6 +29,8 @@
 #define HAL_RX_BE_PKT_HDR_TLV_LEN		112
 
 #ifdef CONFIG_WORD_BASED_TLV
+typedef struct rx_mpdu_start hal_rx_mpdu_start_t;
+typedef struct rx_msdu_end hal_rx_msdu_end_t;
 #else
 typedef struct rx_mpdu_start hal_rx_mpdu_start_t;
 typedef struct rx_msdu_end hal_rx_msdu_end_t;
@@ -75,6 +79,16 @@ struct rx_pkt_tlvs {
 #define HAL_RX_MPDU_START(_rx_pkt_tlv)	\
 	(((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv.	\
 	  rx_mpdu_start.rx_mpdu_info_details)
+
+#else
+
+#define HAL_RX_MSDU_END(_rx_pkt_tlv)		\
+	(((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
+
+#define HAL_RX_MPDU_START(_rx_pkt_tlv)	\
+	(((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv.	\
+	 rx_mpdu_start.rx_mpdu_info_details)
+
 #endif	/* CONFIG_WORD_BASED_TLV */
 
 #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv)	\

hal/wifi3.0/hal_internal.h

@@ -812,6 +812,8 @@ struct hal_hw_txrx_ops {
 	void (*hal_rx_msdu_get_reo_destination_indication)(uint8_t *buf,
 							   uint32_t *reo_destination_indication);
 	uint8_t (*hal_tx_get_num_tcl_banks)(void);
+	uint32_t (*hal_get_reo_qdesc_size)(uint32_t ba_window_size, int tid);
+
 	void (*hal_set_link_desc_addr)(void *desc, uint32_t cookie,
 				       qdf_dma_addr_t link_desc_paddr);
 	void (*hal_tx_init_data_ring)(hal_soc_handle_t hal_soc_hdl,
@@ -841,15 +843,33 @@ struct hal_hw_txrx_ops {
 	uint32_t (*hal_rx_tlv_get_pkt_type)(uint8_t *buf);
 	void (*hal_rx_tlv_get_pn_num)(uint8_t *buf, uint64_t *pn_num);
 	uint8_t * (*hal_rx_pkt_hdr_get)(uint8_t *buf);
+	uint32_t (*hal_rx_msdu_reo_dst_ind_get)(hal_soc_handle_t hal_soc_hdl,
+						void *msdu_link_desc);
+	void (*hal_msdu_desc_info_set)(hal_soc_handle_t hal_soc_hdl,
+				       void *msdu_desc_info, uint32_t dst_ind,
+				       uint32_t nbuf_len);
+	void (*hal_mpdu_desc_info_set)(hal_soc_handle_t hal_soc_hdl,
+				       void *mpdu_desc_info, uint32_t seq_no);
 	uint32_t (*hal_rx_tlv_sgi_get)(uint8_t *buf);
+	uint32_t (*hal_rx_tlv_get_freq)(uint8_t *buf);
+	uint8_t (*hal_rx_msdu_get_keyid)(uint8_t *buf);
 	uint32_t (*hal_rx_tlv_rate_mcs_get)(uint8_t *buf);
 	uint32_t (*hal_rx_tlv_decrypt_err_get)(uint8_t *buf);
 	uint32_t (*hal_rx_tlv_first_mpdu_get)(uint8_t *buf);
 	uint32_t (*hal_rx_tlv_bw_get)(uint8_t *buf);
+	uint32_t (*hal_rx_tlv_get_is_decrypted)(uint8_t *buf);
+
 	uint32_t (*hal_rx_wbm_err_src_get)(hal_ring_desc_t ring_desc);
 	uint8_t (*hal_rx_ret_buf_manager_get)(hal_ring_desc_t ring_desc);
-	void (*hal_rx_buf_cookie_rbm_get)(hal_buff_addrinfo_t buf_addr_info_hdl,
+	void (*hal_rx_msdu_link_desc_set)(hal_soc_handle_t hal_soc_hdl,
+					  void *src_srng_desc,
+					  hal_buff_addrinfo_t buf_addr_info,
+					  uint8_t bm_action);
+
+	void (*hal_rx_buf_cookie_rbm_get)(uint32_t *buf_addr_info_hdl,
 					  hal_buf_info_t buf_info_hdl);
+	void (*hal_rx_reo_buf_paddr_get)(hal_ring_desc_t rx_desc,
+					 struct hal_buf_info *buf_info);
 	void (*hal_rxdma_buff_addr_info_set)(void *rxdma_entry,
 					     qdf_dma_addr_t paddr,
 					     uint32_t cookie, uint8_t manager);
@@ -882,27 +902,11 @@ struct hal_hw_txrx_ops {
 				hal_ring_handle_t  hal_ring_hdl,
 				enum hal_reo_cmd_type cmd,
 				void *params);
-	void (*hal_reo_queue_stats_status)(hal_ring_desc_t ring_desc,
-					   void *st_handle,
-					   hal_soc_handle_t hal_soc_hdl);
-	void (*hal_reo_flush_queue_status)(hal_ring_desc_t ring_desc,
-					   void *st_handle,
-					   hal_soc_handle_t hal_soc_hdl);
-	void (*hal_reo_flush_cache_status)(hal_ring_desc_t ring_desc,
-					   void *st_handle,
-					   hal_soc_handle_t hal_soc_hdl);
-	void (*hal_reo_unblock_cache_status)(hal_ring_desc_t ring_desc,
-					     hal_soc_handle_t hal_soc_hdl,
-					     void *st_handle);
-	void (*hal_reo_flush_timeout_list_status)(hal_ring_desc_t ring_desc,
-						  void *st_handle,
-						  hal_soc_handle_t hal_soc_hdl);
-	void (*hal_reo_desc_thres_reached_status)(hal_ring_desc_t ring_desc,
-						  void *st_handle,
-						  hal_soc_handle_t hal_soc_hdl);
-	void (*hal_reo_rx_update_queue_status)(hal_ring_desc_t ring_desc,
-					       void *st_handle,
-					       hal_soc_handle_t hal_soc_hdl);
+	QDF_STATUS (*hal_reo_status_update)(hal_soc_handle_t hal_soc_hdl,
+					    hal_ring_desc_t reo_desc,
+					    void *st_handle,
+					    uint32_t tlv, int *num_ref);
+	uint8_t (*hal_get_tlv_hdr_size)(void);
 };
 
 /**

hal/wifi3.0/hal_reo.c

@@ -19,8 +19,6 @@
 #include "hal_api.h"
 #include "hal_hw_headers.h"
 #include "hal_reo.h"
-#include "hal_tx.h"
-#include "hal_rx.h"
 #include "qdf_module.h"
 
 void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl,
@@ -32,11 +30,13 @@ void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl,
 	uint32_t desc_size;
 	uint32_t num_desc;
 	struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
+	uint8_t tlv_hdr_size;
 
 	hal_get_srng_params(hal_soc_hdl, hal_ring_hdl, &srng_params);
 
 	desc_addr = (uint32_t *)(srng_params.ring_base_vaddr);
-	desc_addr += HAL_GET_NUM_DWORDS(sizeof(struct tlv_32_hdr));
+	tlv_hdr_size = hal_get_tlv_hdr_size(hal_soc_hdl);
+	desc_addr += HAL_GET_NUM_DWORDS(tlv_hdr_size);
 	desc_size = HAL_GET_NUM_DWORDS(hal_srng_get_entrysize(soc, REO_CMD));
 	num_desc = srng_params.num_entries;
 	cmd_num = 1;

hal/wifi3.0/hal_reo.h

@@ -593,136 +593,22 @@ hal_reo_send_cmd(hal_soc_handle_t hal_soc_hdl,
 	return -EINVAL;
 }
 
-/* REO Status ring routines */
-static inline void
-hal_reo_queue_stats_status(hal_ring_desc_t ring_desc,
-			   struct hal_reo_queue_status *st,
-			   hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_queue_stats_status)
-		return hal_soc->ops->hal_reo_queue_stats_status(ring_desc, st,
-								hal_soc_hdl);
-}
-
-static inline void
-hal_reo_flush_queue_status(hal_ring_desc_t ring_desc,
-			   struct hal_reo_flush_queue_status *st,
-			   hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_flush_queue_status)
-		return hal_soc->ops->hal_reo_flush_queue_status(ring_desc, st,
-								hal_soc_hdl);
-}
-
-static inline void
-hal_reo_flush_cache_status(hal_ring_desc_t ring_desc,
-			   struct hal_reo_flush_cache_status *st,
-			   hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_flush_cache_status)
-		return hal_soc->ops->hal_reo_flush_cache_status(ring_desc, st,
-								hal_soc_hdl);
-}
-
-static inline void
-hal_reo_unblock_cache_status(hal_ring_desc_t ring_desc,
-			     hal_soc_handle_t hal_soc_hdl,
-			     struct hal_reo_unblk_cache_status *st)
+static inline QDF_STATUS
+hal_reo_status_update(hal_soc_handle_t hal_soc_hdl,
+		      hal_ring_desc_t reo_desc, void *st_handle,
+		      uint32_t tlv, int *num_ref)
 {
 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
 
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_unblock_cache_status)
-		return hal_soc->ops->hal_reo_unblock_cache_status(ring_desc,
-								  hal_soc_hdl,
-								  st);
-}
-
-static inline void hal_reo_flush_timeout_list_status(
-			 hal_ring_desc_t ring_desc,
-			 struct hal_reo_flush_timeout_list_status *st,
-			 hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_flush_timeout_list_status)
-		return hal_soc->ops->hal_reo_flush_timeout_list_status(
-						ring_desc, st,
-						hal_soc_hdl);
-}
-
-static inline void hal_reo_desc_thres_reached_status(
-			 hal_ring_desc_t ring_desc,
-			 struct hal_reo_desc_thres_reached_status *st,
-			 hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_desc_thres_reached_status)
-		return hal_soc->ops->hal_reo_desc_thres_reached_status(
-						ring_desc, st,
-						hal_soc_hdl);
-}
-
-static inline void
-hal_reo_rx_update_queue_status(hal_ring_desc_t ring_desc,
-			       struct hal_reo_update_rx_queue_status *st,
-			       hal_soc_handle_t hal_soc_hdl)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-
-	if (!hal_soc || !hal_soc->ops) {
-		hal_err("hal handle is NULL");
-		QDF_BUG(0);
-		return;
-	}
-
-	if (hal_soc->ops->hal_reo_rx_update_queue_status)
-		return hal_soc->ops->hal_reo_rx_update_queue_status(
-				ring_desc, st, hal_soc_hdl);
+	if (hal_soc->ops->hal_reo_send_cmd)
+		return hal_soc->ops->hal_reo_status_update(hal_soc_hdl,
+							   reo_desc,
+							   st_handle,
+							   tlv, num_ref);
+	return QDF_STATUS_E_FAILURE;
 }
 
+/* REO Status ring routines */
 static inline void hal_reo_qdesc_setup(hal_soc_handle_t hal_soc_hdl, int tid,
 				       uint32_t ba_window_size,
 			 uint32_t start_seq, void *hw_qdesc_vaddr,
@@ -808,6 +694,16 @@ hal_gen_reo_remap_val(hal_soc_handle_t hal_soc_hdl,
 	return 0;
 }
 
+static inline uint8_t
+hal_get_tlv_hdr_size(hal_soc_handle_t hal_soc_hdl)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_get_tlv_hdr_size)
+		return hal_soc->ops->hal_get_tlv_hdr_size();
+
+	return 0;
+}
 /* Function Proto-types */
 
 /**
@@ -815,7 +711,6 @@ hal_gen_reo_remap_val(hal_soc_handle_t hal_soc_hdl,
  * with command number
  * @hal_soc: Handle to HAL SoC structure
  * @hal_ring: Handle to HAL SRNG structure
- *
  * Return: none
  */
 void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl,

hal/wifi3.0/hal_rx.h

@@ -57,6 +57,8 @@
 #define RX_MONITOR_BUFFER_SIZE  2048
 #endif
 
+#define RXDMA_OPTIMIZATION
+
 /* MONITOR STATUS BUFFER SIZE = 1408 data bytes, buffer allocation of 2k bytes
  * including buffer reservation, buffer alignment and skb shared info size.
  */
@@ -67,6 +69,8 @@
 				 (RX_MON_STATUS_BUF_RESERVATION + \
 				  RX_MON_STATUS_BUF_ALIGN + QDF_SHINFO_SIZE))
 
+#define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
+
 /* HAL_RX_NON_QOS_TID = NON_QOS_TID which is 16 */
 #define HAL_RX_NON_QOS_TID 16
 
@@ -366,10 +370,6 @@ enum hal_rx_mpdu_desc_flags {
 		HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MASK,	\
 		HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_LSB))
 
-#define HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET	0x4
-#define HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_LSB	0
-#define HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MASK	0x000000ff
-
 #define HAL_RX_BUFFER_ADDR_39_32_GET(buff_addr_info)			\
 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info,			\
 		HAL_BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET)),	\
@@ -416,16 +416,6 @@ enum hal_rx_mpdu_desc_flags {
 		HAL_RX_MSDU_DESC_INFO_MSDU_LENGTH_MASK,		\
 		HAL_RX_MSDU_DESC_INFO_MSDU_LENGTH_LSB))
 
-#define HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_desc)	\
-	(HAL_RX_BUFFER_ADDR_39_32_GET(&			\
-	(((struct reo_destination_ring *)		\
-		reo_desc)->buf_or_link_desc_addr_info)))
-
-#define HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_desc)	\
-	(HAL_RX_BUFFER_ADDR_31_0_GET(&			\
-	(((struct reo_destination_ring *)		\
-		reo_desc)->buf_or_link_desc_addr_info)))
-
 static inline uint32_t
 hal_rx_msdu_flags_get(hal_soc_handle_t hal_soc_hdl,
 		      rx_msdu_desc_info_t msdu_desc_info_hdl)
@@ -435,35 +425,6 @@ hal_rx_msdu_flags_get(hal_soc_handle_t hal_soc_hdl,
 	return hal_soc->ops->hal_rx_msdu_flags_get(msdu_desc_info_hdl);
 }
 
-/*
- *hal_rx_msdu_desc_info_get: Gets the flags related to MSDU descriptor.
- *		Specifically flags needed are: first_msdu_in_mpdu,
- *		last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
- *		sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
- *
- *@hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to the current
- *			   descriptor
- *@msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
- *
- *Return: void
- */
-static inline void
-hal_rx_msdu_desc_info_get(hal_soc_handle_t hal_soc_hdl,
-			  void *desc_addr,
-			  struct hal_rx_msdu_desc_info *msdu_desc_info)
-{
-	struct reo_destination_ring *reo_dst_ring;
-	uint32_t *msdu_info;
-
-	reo_dst_ring = (struct reo_destination_ring *) desc_addr;
-
-	msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
-	msdu_desc_info->msdu_flags = hal_rx_msdu_flags_get(
-					hal_soc_hdl,
-					(struct rx_msdu_desc_info *)msdu_info);
-	msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
-}
-
 /*
  * Structures & Macros to obtain fields from the TLV's in the Rx packet
  * pre-header.
@@ -1207,15 +1168,17 @@ void *hal_rx_msdu_desc_info_get_ptr(void *msdu_details_ptr,
  * Return: void
  */
 static inline
-void hal_rx_reo_buf_paddr_get(hal_ring_desc_t rx_desc,
+void hal_rx_reo_buf_paddr_get(hal_soc_handle_t hal_soc_hdl,
+			      hal_ring_desc_t rx_desc,
 			      struct hal_buf_info *buf_info)
 {
-	struct reo_destination_ring *reo_ring =
-		 (struct reo_destination_ring *)rx_desc;
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_reo_buf_paddr_get)
+		return hal_soc->ops->hal_rx_reo_buf_paddr_get(
+					rx_desc,
+					buf_info);
 
-	buf_info->paddr =
-	 (HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_ring) |
-	  ((uint64_t)(HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_ring)) << 32));
 }
 
 /**
@@ -1236,7 +1199,7 @@ void hal_rx_buf_cookie_rbm_get(hal_soc_handle_t hal_soc_hdl,
 	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
 
 	return hal_soc->ops->hal_rx_buf_cookie_rbm_get(
-					(hal_buff_addrinfo_t)buf_addr_info,
+					buf_addr_info,
 					buf_info);
 }
 
@@ -1399,44 +1362,13 @@ void hal_rx_msdu_link_desc_set(hal_soc_handle_t hal_soc_hdl,
 			       hal_buff_addrinfo_t buf_addr_info,
 			       uint8_t bm_action)
 {
-	/*
-	 * The offsets for fields used in this function are same in
-	 * wbm_release_ring for Lithium and wbm_release_ring_tx
-	 * for Beryllium. hence we can use wbm_release_ring directly.
-	 */
-	struct wbm_release_ring *wbm_rel_srng =
-			(struct wbm_release_ring *)src_srng_desc;
-	uint32_t addr_31_0;
-	uint8_t addr_39_32;
-
-	/* Structure copy !!! */
-	wbm_rel_srng->released_buff_or_desc_addr_info =
-				*((struct buffer_addr_info *)buf_addr_info);
-
-	addr_31_0 =
-	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_31_0;
-	addr_39_32 =
-	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_39_32;
-
-	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
-			   RELEASE_SOURCE_MODULE, HAL_RX_WBM_ERR_SRC_SW);
-	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING, BM_ACTION,
-			   bm_action);
-	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
-			   BUFFER_OR_DESC_TYPE,
-			   HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC);
-
-	/* WBM error is indicated when any of the link descriptors given to
-	 * WBM has a NULL address, and one those paths is the link descriptors
-	 * released from host after processing RXDMA errors,
-	 * or from Rx defrag path, and we want to add an assert here to ensure
-	 * host is not releasing descriptors with NULL address.
-	 */
-
-	if (qdf_unlikely(!addr_31_0 && !addr_39_32)) {
-		hal_dump_wbm_rel_desc(src_srng_desc);
-		qdf_assert_always(0);
-	}
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_msdu_link_desc_set)
+		return hal_soc->ops->hal_rx_msdu_link_desc_set(hal_soc_hdl,
+					src_srng_desc,
+					buf_addr_info,
+					bm_action);
 }
 
 /**
@@ -1496,6 +1428,7 @@ static inline void hal_rx_dump_mpdu_start_tlv(struct rx_mpdu_start *mpdu_start,
 
 	hal->ops->hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level);
 }
+
 /**
  * hal_rx_dump_msdu_end_tlv: dump RX msdu_end TLV in structured
  *			     human readable format.
@@ -1523,12 +1456,6 @@ static inline uint8_t hal_srng_ring_id_get(hal_ring_handle_t hal_ring_hdl)
 	return ((struct hal_srng *)hal_ring_hdl)->ring_id;
 }
 
-/* Rx MSDU link pointer info */
-struct hal_rx_msdu_link_ptr_info {
-	struct rx_msdu_link msdu_link;
-	struct hal_buf_info msdu_link_buf_info;
-};
-
 #define DOT11_SEQ_FRAG_MASK		0x000f
 #define DOT11_FC1_MORE_FRAG_OFFSET	0x04
 
@@ -1604,20 +1531,6 @@ hal_rx_clear_mpdu_desc_info(struct hal_rx_mpdu_desc_info *rx_mpdu_desc_info)
 	qdf_mem_zero(rx_mpdu_desc_info, sizeof(*rx_mpdu_desc_info));
 }
 
-/*
- * hal_rx_clear_msdu_link_ptr(): Clears msdu_link_ptr
- *
- * @msdu_link_ptr: HAL view of msdu link ptr
- * @size: number of msdu link pointers
- * Returns: None
- */
-static inline
-void hal_rx_clear_msdu_link_ptr(struct hal_rx_msdu_link_ptr_info *msdu_link_ptr,
-				int size)
-{
-	qdf_mem_zero(msdu_link_ptr, (sizeof(*msdu_link_ptr) * size));
-}
-
 /**
  * hal_rx_wbm_err_info_get(): Retrieves WBM error code and reason and
  *	save it to hal_wbm_err_desc_info structure passed by caller
@@ -2582,6 +2495,17 @@ hal_rx_tlv_get_pn_num(hal_soc_handle_t hal_soc_hdl,
 	hal_soc->ops->hal_rx_tlv_get_pn_num(buf, pn_num);
 }
 
+static inline uint32_t
+hal_rx_tlv_get_is_decrypted(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_tlv_get_is_decrypted)
+		return hal_soc->ops->hal_rx_tlv_get_is_decrypted(buf);
+
+	return 0;
+}
+
 static inline uint8_t *
 hal_rx_pkt_hdr_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
 {
@@ -2590,6 +2514,61 @@ hal_rx_pkt_hdr_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
 	return hal_soc->ops->hal_rx_pkt_hdr_get(buf);
 }
 
+static inline uint8_t
+hal_rx_msdu_get_keyid(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_msdu_get_keyid)
+		return hal_soc->ops->hal_rx_msdu_get_keyid(buf);
+
+	return 0;
+}
+
+static inline uint32_t
+hal_rx_tlv_get_freq(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_tlv_get_freq)
+		return hal_soc->ops->hal_rx_tlv_get_freq(buf);
+
+	return 0;
+}
+
+static inline void hal_mpdu_desc_info_set(hal_soc_handle_t hal_soc_hdl,
+					  void *mpdu_desc_info, uint32_t val)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_mpdu_desc_info_set)
+		return hal_soc->ops->hal_mpdu_desc_info_set(
+				hal_soc_hdl, mpdu_desc_info, val);
+}
+
+static inline void hal_msdu_desc_info_set(hal_soc_handle_t hal_soc_hdl,
+					  void *msdu_desc_info,
+					  uint32_t val, uint32_t nbuf_len)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_msdu_desc_info_set)
+		return hal_soc->ops->hal_msdu_desc_info_set(
+				hal_soc_hdl, msdu_desc_info, val, nbuf_len);
+}
+
+static inline uint32_t
+hal_rx_msdu_reo_dst_ind_get(hal_soc_handle_t hal_soc_hdl, void *msdu_link_desc)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (hal_soc->ops->hal_rx_msdu_reo_dst_ind_get)
+		return hal_soc->ops->hal_rx_msdu_reo_dst_ind_get(
+				hal_soc_hdl, msdu_link_desc);
+
+	return 0;
+}
+
 static inline uint32_t
 hal_rx_tlv_sgi_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
 {

hal/wifi3.0/hal_srng.c

@@ -20,8 +20,8 @@
 #include "hal_api.h"
 #include "hal_reo.h"
 #include "target_type.h"
-#include "wcss_version.h"
 #include "qdf_module.h"
+#include "wcss_version.h"
 
 #ifdef QCA_WIFI_QCA8074
 void hal_qca6290_attach(struct hal_soc *hal);

hal/wifi3.0/hal_tx.h

@@ -72,11 +72,15 @@ do {                                            \
 #define HAL_TX_BUF_TYPE_BUFFER 0
 #define HAL_TX_BUF_TYPE_EXT_DESC 1
 
+#define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
+
 #define HAL_TX_DESC_LEN_DWORDS (NUM_OF_DWORDS_TCL_DATA_CMD)
 #define HAL_TX_DESC_LEN_BYTES  (NUM_OF_DWORDS_TCL_DATA_CMD * 4)
 #define HAL_TX_EXTENSION_DESC_LEN_DWORDS (NUM_OF_DWORDS_TX_MSDU_EXTENSION)
 #define HAL_TX_EXTENSION_DESC_LEN_BYTES (NUM_OF_DWORDS_TX_MSDU_EXTENSION * 4)
 
+#define NUM_OF_DWORDS_WBM_RELEASE_RING 8
+
 #define HAL_TX_COMPLETION_DESC_LEN_DWORDS (NUM_OF_DWORDS_WBM_RELEASE_RING)
 #define HAL_TX_COMPLETION_DESC_LEN_BYTES (NUM_OF_DWORDS_WBM_RELEASE_RING*4)
 #define HAL_TX_BITS_PER_TID 3

hal/wifi3.0/li/hal_li_api.h

@@ -105,7 +105,6 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *soc);
 void hal_rx_wbm_err_info_get_generic_li(void *wbm_desc, void *wbm_er_info1);
 uint32_t hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc);
 uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc);
-void hal_rx_mpdu_desc_info_get_li(void *desc_addr, void *mpdu_desc_info_hdl);
 
 /**
  * hal_reo_qdesc_setup - Setup HW REO queue descriptor

hal/wifi3.0/li/hal_li_generic_api.c

@@ -134,6 +134,33 @@ void hal_reo_setup_generic_li(struct hal_soc *soc, void *reoparams)
 	 */
 }
 
+static uint32_t hal_get_reo_qdesc_size_li(uint32_t ba_window_size, int tid)
+{
+	/* Return descriptor size corresponding to window size of 2 since
+	 * we set ba_window_size to 2 while setting up REO descriptors as
+	 * a WAR to get 2k jump exception aggregates are received without
+	 * a BA session.
+	 */
+	if (ba_window_size <= 1) {
+		if (tid != HAL_NON_QOS_TID)
+			return sizeof(struct rx_reo_queue) +
+				sizeof(struct rx_reo_queue_ext);
+		else
+			return sizeof(struct rx_reo_queue);
+	}
+
+	if (ba_window_size <= 105)
+		return sizeof(struct rx_reo_queue) +
+			sizeof(struct rx_reo_queue_ext);
+
+	if (ba_window_size <= 210)
+		return sizeof(struct rx_reo_queue) +
+			(2 * sizeof(struct rx_reo_queue_ext));
+
+	return sizeof(struct rx_reo_queue) +
+		(3 * sizeof(struct rx_reo_queue_ext));
+}
+
 void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
 			       qdf_dma_addr_t link_desc_paddr)
 {
@@ -761,17 +788,84 @@ uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc)
 }
 
 /**
- * hal_rx_reo_ent_buf_paddr_get_li: Gets the physical address and
- * cookie from the REO entrance ring element
+ * hal_rx_reo_buf_paddr_get_li: Gets the physical address and
+ * cookie from the REO destination ring element
  *
- * @ hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to
+ * @ rx_desc: Opaque cookie pointer used by HAL to get to
  * the current descriptor
  * @ buf_info: structure to return the buffer information
- * @ msdu_cnt: pointer to msdu count in MPDU
  * Return: void
  */
+static void hal_rx_reo_buf_paddr_get_li(hal_ring_desc_t rx_desc,
+					struct hal_buf_info *buf_info)
+{
+	struct reo_destination_ring *reo_ring =
+		 (struct reo_destination_ring *)rx_desc;
+
+	buf_info->paddr =
+	 (HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_ring) |
+	  ((uint64_t)(HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_ring)) << 32));
+	buf_info->sw_cookie = HAL_RX_REO_BUF_COOKIE_GET(reo_ring);
+}
+
+/**
+ * hal_rx_msdu_link_desc_set_li: Retrieves MSDU Link Descriptor to WBM
+ *
+ * @ hal_soc_hdl	: HAL version of the SOC pointer
+ * @ src_srng_desc	: void pointer to the WBM Release Ring descriptor
+ * @ buf_addr_info	: void pointer to the buffer_addr_info
+ * @ bm_action		: put in IDLE list or release to MSDU_LIST
+ *
+ * Return: void
+ */
+/* look at implementation at dp_hw_link_desc_pool_setup()*/
+static void hal_rx_msdu_link_desc_set_li(hal_soc_handle_t hal_soc_hdl,
+					 void *src_srng_desc,
+					 hal_buff_addrinfo_t buf_addr_info,
+					 uint8_t bm_action)
+{
+	/*
+	 * The offsets for fields used in this function are same in
+	 * wbm_release_ring for Lithium and wbm_release_ring_tx
+	 * for Beryllium. hence we can use wbm_release_ring directly.
+	 */
+	struct wbm_release_ring *wbm_rel_srng =
+			(struct wbm_release_ring *)src_srng_desc;
+	uint32_t addr_31_0;
+	uint8_t addr_39_32;
+
+	/* Structure copy !!! */
+	wbm_rel_srng->released_buff_or_desc_addr_info =
+			*(struct buffer_addr_info *)buf_addr_info;
+
+	addr_31_0 =
+	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_31_0;
+	addr_39_32 =
+	wbm_rel_srng->released_buff_or_desc_addr_info.buffer_addr_39_32;
+
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
+			   RELEASE_SOURCE_MODULE, HAL_RX_WBM_ERR_SRC_SW);
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING, BM_ACTION,
+			   bm_action);
+	HAL_DESC_SET_FIELD(src_srng_desc, HAL_SW2WBM_RELEASE_RING,
+			   BUFFER_OR_DESC_TYPE,
+			   HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC);
+
+	/* WBM error is indicated when any of the link descriptors given to
+	 * WBM has a NULL address, and one those paths is the link descriptors
+	 * released from host after processing RXDMA errors,
+	 * or from Rx defrag path, and we want to add an assert here to ensure
+	 * host is not releasing descriptors with NULL address.
+	 */
+
+	if (qdf_unlikely(!addr_31_0 && !addr_39_32)) {
+		hal_dump_wbm_rel_desc(src_srng_desc);
+		qdf_assert_always(0);
+	}
+}
+
 static
-void hal_rx_buf_cookie_rbm_get_li(hal_buff_addrinfo_t buf_addr_info_hdl,
+void hal_rx_buf_cookie_rbm_get_li(uint32_t *buf_addr_info_hdl,
 				  hal_buf_info_t buf_info_hdl)
 {
 	struct hal_buf_info *buf_info =
@@ -784,8 +878,84 @@ void hal_rx_buf_cookie_rbm_get_li(hal_buff_addrinfo_t buf_addr_info_hdl,
 	 * buffer addr info is the first member of ring desc, so the typecast
 	 * can be done.
 	 */
-	buf_info->rbm = hal_rx_ret_buf_manager_get_li(
-						(hal_ring_desc_t)buf_addr_info);
+	buf_info->rbm = hal_rx_ret_buf_manager_get_li
+				((hal_ring_desc_t)buf_addr_info);
+}
+
+/**
+ * hal_rx_msdu_link_desc_get(): API to get the MSDU information
+ * from the MSDU link descriptor
+ *
+ * @ hal_soc_hdl	: HAL version of the SOC pointer
+ * @msdu_link_desc: Opaque pointer used by HAL to get to the
+ * MSDU link descriptor (struct rx_msdu_link)
+ *
+ * @msdu_list: Return the list of MSDUs contained in this link descriptor
+ *
+ * @num_msdus: Number of MSDUs in the MPDU
+ *
+ * Return: void
+ */
+static inline void hal_rx_msdu_list_get_li(hal_soc_handle_t hal_soc_hdl,
+					   void *msdu_link_desc,
+					   void *hal_msdu_list,
+					   uint16_t *num_msdus)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+	struct rx_msdu_details *msdu_details;
+	struct rx_msdu_desc_info *msdu_desc_info;
+	struct hal_rx_msdu_list *msdu_list = hal_msdu_list;
+	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
+	int i;
+	struct hal_buf_info buf_info;
+
+	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
+
+	hal_debug("msdu_link=%pK msdu_details=%pK", msdu_link, msdu_details);
+	for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {
+		/* num_msdus received in mpdu descriptor may be incorrect
+		 * sometimes due to HW issue. Check msdu buffer address also
+		 */
+		if (!i && (HAL_RX_BUFFER_ADDR_31_0_GET(
+			&msdu_details[i].buffer_addr_info_details) == 0))
+			break;
+		if (HAL_RX_BUFFER_ADDR_31_0_GET(
+			&msdu_details[i].buffer_addr_info_details) == 0) {
+			/* set the last msdu bit in the prev msdu_desc_info */
+			msdu_desc_info =
+				hal_rx_msdu_desc_info_get_ptr
+					(&msdu_details[i - 1], hal_soc);
+			HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
+			break;
+		}
+		msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[i],
+							       hal_soc);
+
+		/* set first MSDU bit or the last MSDU bit */
+		if (!i)
+			HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
+		else if (i == (HAL_RX_NUM_MSDU_DESC - 1))
+			HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1);
+
+		msdu_list->msdu_info[i].msdu_flags =
+			 hal_rx_msdu_flags_get(hal_soc_hdl, msdu_desc_info);
+		msdu_list->msdu_info[i].msdu_len =
+			 HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info);
+
+		/* addr field in buf_info will not be valid */
+		hal_rx_buf_cookie_rbm_get_li(
+				(uint32_t *)
+				&msdu_details[i].buffer_addr_info_details,
+				&buf_info);
+		msdu_list->sw_cookie[i] = buf_info.sw_cookie;
+		msdu_list->rbm[i] = buf_info.rbm;
+		msdu_list->paddr[i] = HAL_RX_BUFFER_ADDR_31_0_GET(
+			   &msdu_details[i].buffer_addr_info_details) |
+			   (uint64_t)HAL_RX_BUFFER_ADDR_39_32_GET(
+			   &msdu_details[i].buffer_addr_info_details) << 32;
+		hal_debug("i=%d sw_cookie=%d", i, msdu_list->sw_cookie[i]);
+	}
+	*num_msdus = i;
 }
 
 /*
@@ -809,45 +979,6 @@ static void hal_rxdma_buff_addr_info_set_li(void *rxdma_entry,
 	HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
 }
 
-/**
- * hal_rx_msdu_flags_get_li() - Get msdu flags from ring desc
- * @msdu_desc_info_hdl: msdu desc info handle
- *
- * Return: msdu flags
- */
-static uint32_t hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)
-{
-	struct rx_msdu_desc_info *msdu_desc_info =
-		(struct rx_msdu_desc_info *)msdu_desc_info_hdl;
-	uint32_t flags = 0;
-
-	if (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_FIRST_MSDU_IN_MPDU;
-
-	if (HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_LAST_MSDU_IN_MPDU;
-
-	if (HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_MSDU_CONTINUATION;
-
-	if (HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_SA_IS_VALID;
-
-	if (HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_SA_IDX_TIMEOUT;
-
-	if (HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_DA_IS_VALID;
-
-	if (HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_DA_IDX_TIMEOUT;
-
-	if (HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_desc_info))
-		flags |= HAL_MSDU_F_DA_IS_MCBC;
-
-	return flags;
-}
-
 /**
  * hal_rx_get_reo_error_code_li() - Get REO error code from ring desc
  * @rx_desc: rx descriptor
@@ -1045,8 +1176,349 @@ hal_rx_msdu_start_msdu_len_set_li(uint8_t *buf, uint32_t len)
 	*(uint32_t *)wrd1 |= len;
 }
 
+/*
+ * hal_rx_tlv_bw_get_li(): API to get the Bandwidth
+ * Interval from rx_msdu_start
+ *
+ * @buf: pointer to the start of RX PKT TLV header
+ * Return: uint32_t(bw)
+ */
+static inline uint32_t hal_rx_tlv_bw_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_start *msdu_start =
+		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
+	uint32_t bw;
+
+	bw = HAL_RX_MSDU_START_BW_GET(msdu_start);
+
+	return bw;
+}
+
+/*
+ * hal_rx_tlv_get_freq_li(): API to get the frequency of operating channel
+ * from rx_msdu_start
+ *
+ * @buf: pointer to the start of RX PKT TLV header
+ * Return: uint32_t(frequency)
+ */
+static inline uint32_t
+hal_rx_tlv_get_freq_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_start *msdu_start =
+		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
+	uint32_t freq;
+
+	freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
+
+	return freq;
+}
+
 /**
- * hal_hw_txrx_default_ops_attach_be() - Attach the default hal ops for
+ * hal_rx_tlv_sgi_get_li(): API to get the Short Gaurd
+ * Interval from rx_msdu_start TLV
+ *
+ * @buf: pointer to the start of RX PKT TLV headers
+ * Return: uint32_t(sgi)
+ */
+static inline uint32_t
+hal_rx_tlv_sgi_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_start *msdu_start =
+		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
+	uint32_t sgi;
+
+	sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start);
+
+	return sgi;
+}
+
+/**
+ * hal_rx_tlv_rate_mcs_get_li(): API to get the MCS rate
+ * from rx_msdu_start TLV
+ *
+ * @buf: pointer to the start of RX PKT TLV headers
+ * Return: uint32_t(rate_mcs)
+ */
+static inline uint32_t
+hal_rx_tlv_rate_mcs_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_start *msdu_start =
+		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
+	uint32_t rate_mcs;
+
+	rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start);
+
+	return rate_mcs;
+}
+
+/*
+ * hal_rx_tlv_get_pkt_type_li(): API to get the pkt type
+ * from rx_msdu_start
+ *
+ * @buf: pointer to the start of RX PKT TLV header
+ * Return: uint32_t(pkt type)
+ */
+
+static inline uint32_t hal_rx_tlv_get_pkt_type_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_start *msdu_start =
+		&pkt_tlvs->msdu_start_tlv.rx_msdu_start;
+	uint32_t pkt_type;
+
+	pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start);
+
+	return pkt_type;
+}
+
+/**
+ * hal_rx_tlv_mic_err_get_li(): API to get the MIC ERR
+ * from rx_mpdu_end TLV
+ *
+ * @buf: pointer to the start of RX PKT TLV headers
+ * Return: uint32_t(mic_err)
+ */
+static inline uint32_t
+hal_rx_tlv_mic_err_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_mpdu_end *mpdu_end =
+		&pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
+	uint32_t mic_err;
+
+	mic_err = HAL_RX_MPDU_END_MIC_ERR_GET(mpdu_end);
+
+	return mic_err;
+}
+
+/**
+ * hal_rx_tlv_decrypt_err_get_li(): API to get the Decrypt ERR
+ * from rx_mpdu_end TLV
+ *
+ * @buf: pointer to the start of RX PKT TLV headers
+ * Return: uint32_t(decrypt_err)
+ */
+static inline uint32_t
+hal_rx_tlv_decrypt_err_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_mpdu_end *mpdu_end =
+		&pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
+	uint32_t decrypt_err;
+
+	decrypt_err = HAL_RX_MPDU_END_DECRYPT_ERR_GET(mpdu_end);
+
+	return decrypt_err;
+}
+
+/*
+ * hal_rx_tlv_first_mpdu_get_li(): get fist_mpdu bit from rx attention
+ * @buf: pointer to rx_pkt_tlvs
+ *
+ * reutm: uint32_t(first_msdu)
+ */
+static inline uint32_t
+hal_rx_tlv_first_mpdu_get_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
+	uint32_t first_mpdu;
+
+	first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn);
+
+	return first_mpdu;
+}
+
+/*
+ * hal_rx_msdu_get_keyid_li(): API to get the key id if the decrypted packet
+ * from rx_msdu_end
+ *
+ * @buf: pointer to the start of RX PKT TLV header
+ * Return: uint32_t(key id)
+ */
+static inline uint8_t
+hal_rx_msdu_get_keyid_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
+	uint32_t keyid_octet;
+
+	keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
+
+	return keyid_octet & 0x3;
+}
+
+/*
+ * hal_rx_tlv_get_is_decrypted_li(): API to get the decrypt status of the
+ *  packet from rx_attention
+ *
+ * @buf: pointer to the start of RX PKT TLV header
+ * Return: uint32_t(decryt status)
+ */
+static inline uint32_t
+hal_rx_tlv_get_is_decrypted_li(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
+	struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
+	uint32_t is_decrypt = 0;
+	uint32_t decrypt_status;
+
+	decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn);
+
+	if (!decrypt_status)
+		is_decrypt = 1;
+
+	return is_decrypt;
+}
+
+/**
+ * hal_rx_msdu_reo_dst_ind_get_li: Gets the REO
+ * destination ring ID from the msdu desc info
+ *
+ * @ hal_soc_hdl	: HAL version of the SOC pointer
+ * @msdu_link_desc : Opaque cookie pointer used by HAL to get to
+ * the current descriptor
+ *
+ * Return: dst_ind (REO destination ring ID)
+ */
+static inline uint32_t
+hal_rx_msdu_reo_dst_ind_get_li(hal_soc_handle_t hal_soc_hdl,
+			       void *msdu_link_desc)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+	struct rx_msdu_details *msdu_details;
+	struct rx_msdu_desc_info *msdu_desc_info;
+	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
+	uint32_t dst_ind;
+
+	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
+
+	/* The first msdu in the link should exsist */
+	msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[0],
+						       hal_soc);
+	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
+	return dst_ind;
+}
+
+static inline void
+hal_mpdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,
+			  void *mpdu_desc, uint32_t seq_no)
+{
+	struct rx_mpdu_desc_info *mpdu_desc_info =
+			(struct rx_mpdu_desc_info *)mpdu_desc;
+
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  MSDU_COUNT, 0x1);
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  MPDU_SEQUENCE_NUMBER, seq_no);
+	/* unset frag bit */
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  FRAGMENT_FLAG, 0x0);
+	/* set sa/da valid bits */
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  SA_IS_VALID, 0x1);
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  DA_IS_VALID, 0x1);
+	HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
+				  RAW_MPDU, 0x0);
+}
+
+static inline void
+hal_msdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,
+			  void *msdu_desc, uint32_t dst_ind,
+			  uint32_t nbuf_len)
+{
+	struct rx_msdu_desc_info *msdu_desc_info =
+		(struct rx_msdu_desc_info *)msdu_desc;
+
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  FIRST_MSDU_IN_MPDU_FLAG, 1);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  LAST_MSDU_IN_MPDU_FLAG, 1);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  MSDU_CONTINUATION, 0x0);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  REO_DESTINATION_INDICATION,
+				  dst_ind);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  MSDU_LENGTH, nbuf_len);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  SA_IS_VALID, 1);
+	HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
+				  DA_IS_VALID, 1);
+}
+
+static QDF_STATUS hal_reo_status_update_li(hal_soc_handle_t hal_soc_hdl,
+					   hal_ring_desc_t reo_desc,
+					   void *st_handle,
+					   uint32_t tlv, int *num_ref)
+{
+	union hal_reo_status *reo_status_ref;
+
+	reo_status_ref = (union hal_reo_status *)st_handle;
+
+	switch (tlv) {
+	case HAL_REO_QUEUE_STATS_STATUS_TLV:
+		hal_reo_queue_stats_status_li(reo_desc,
+					      &reo_status_ref->queue_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->queue_status.header.cmd_num;
+		break;
+	case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
+		hal_reo_flush_queue_status_li(reo_desc,
+					      &reo_status_ref->fl_queue_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_queue_status.header.cmd_num;
+		break;
+	case HAL_REO_FLUSH_CACHE_STATUS_TLV:
+		hal_reo_flush_cache_status_li(reo_desc,
+					      &reo_status_ref->fl_cache_status,
+					      hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_cache_status.header.cmd_num;
+		break;
+	case HAL_REO_UNBLK_CACHE_STATUS_TLV:
+		hal_reo_unblock_cache_status_li(
+					reo_desc, hal_soc_hdl,
+					&reo_status_ref->unblk_cache_status);
+		*num_ref = reo_status_ref->unblk_cache_status.header.cmd_num;
+		break;
+	case HAL_REO_TIMOUT_LIST_STATUS_TLV:
+		hal_reo_flush_timeout_list_status_li(
+					reo_desc,
+					&reo_status_ref->fl_timeout_status,
+					hal_soc_hdl);
+		*num_ref = reo_status_ref->fl_timeout_status.header.cmd_num;
+		break;
+	case HAL_REO_DESC_THRES_STATUS_TLV:
+		hal_reo_desc_thres_reached_status_li(
+						reo_desc,
+						&reo_status_ref->thres_status,
+						hal_soc_hdl);
+		*num_ref = reo_status_ref->thres_status.header.cmd_num;
+		break;
+	case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
+		hal_reo_rx_update_queue_status_li(
+					reo_desc,
+					&reo_status_ref->rx_queue_status,
+					hal_soc_hdl);
+		*num_ref = reo_status_ref->rx_queue_status.header.cmd_num;
+		break;
+	default:
+		QDF_TRACE(QDF_MODULE_ID_DP_REO, QDF_TRACE_LEVEL_WARN,
+			  "hal_soc %pK: no handler for TLV:%d",
+			   hal_soc_hdl, tlv);
+		return QDF_STATUS_E_FAILURE;
+	} /* switch */
+
+	return QDF_STATUS_SUCCESS;
+}
+
+/**
+ * hal_hw_txrx_default_ops_attach_li() - Attach the default hal ops for
  *		lithium chipsets.
  * @hal_soc_hdl: HAL soc handle
  *
@@ -1054,6 +1526,7 @@ hal_rx_msdu_start_msdu_len_set_li(uint8_t *buf, uint32_t len)
  */
 void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
 {
+	hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_li;
 	hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_li;
 	hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_li;
 	hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_li;
@@ -1080,6 +1553,8 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
 	hal_soc->ops->hal_rx_get_proto_params = hal_rx_get_proto_params_li;
 	hal_soc->ops->hal_rx_get_l3_l4_offsets = hal_rx_get_l3_l4_offsets_li;
 
+	hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_li;
+	hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_li;
 	hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_li;
 	hal_soc->ops->hal_rx_ret_buf_manager_get =
 						hal_rx_ret_buf_manager_get_li;
@@ -1108,21 +1583,6 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
 	hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get =
 					hal_rx_tlv_mpdu_fcs_err_get_li;
 	hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_li;
-	hal_soc->ops->hal_reo_queue_stats_status =
-						hal_reo_queue_stats_status_li;
-	hal_soc->ops->hal_reo_flush_queue_status =
-						hal_reo_flush_queue_status_li;
-	hal_soc->ops->hal_reo_flush_cache_status =
-						hal_reo_flush_cache_status_li;
-	hal_soc->ops->hal_reo_unblock_cache_status =
-						hal_reo_unblock_cache_status_li;
-	hal_soc->ops->hal_reo_flush_timeout_list_status =
-					hal_reo_flush_timeout_list_status_li;
-	hal_soc->ops->hal_reo_desc_thres_reached_status =
-					hal_reo_desc_thres_reached_status_li;
-	hal_soc->ops->hal_reo_rx_update_queue_status =
-					hal_reo_rx_update_queue_status_li;
-
 	hal_soc->ops->hal_rx_tlv_get_pkt_capture_flags =
 					hal_rx_tlv_get_pkt_capture_flags_li;
 	hal_soc->ops->hal_rx_desc_get_80211_hdr = hal_rx_desc_get_80211_hdr_li;
@@ -1131,4 +1591,22 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
 	hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_li;
 	hal_soc->ops->hal_rx_tlv_msdu_len_set =
 					hal_rx_msdu_start_msdu_len_set_li;
+	hal_soc->ops->hal_rx_tlv_bw_get = hal_rx_tlv_bw_get_li;
+	hal_soc->ops->hal_rx_tlv_get_freq = hal_rx_tlv_get_freq_li;
+	hal_soc->ops->hal_rx_tlv_sgi_get = hal_rx_tlv_sgi_get_li;
+	hal_soc->ops->hal_rx_tlv_rate_mcs_get = hal_rx_tlv_rate_mcs_get_li;
+	hal_soc->ops->hal_rx_tlv_get_pkt_type = hal_rx_tlv_get_pkt_type_li;
+	hal_soc->ops->hal_rx_tlv_mic_err_get = hal_rx_tlv_mic_err_get_li;
+	hal_soc->ops->hal_rx_tlv_decrypt_err_get =
+			hal_rx_tlv_decrypt_err_get_li;
+	hal_soc->ops->hal_rx_tlv_first_mpdu_get = hal_rx_tlv_first_mpdu_get_li;
+	hal_soc->ops->hal_rx_tlv_get_is_decrypted =
+			hal_rx_tlv_get_is_decrypted_li;
+	hal_soc->ops->hal_rx_msdu_get_keyid = hal_rx_msdu_get_keyid_li;
+	hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
+			hal_rx_msdu_reo_dst_ind_get_li;
+	hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_li;
+	hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_li;
+	hal_soc->ops->hal_reo_status_update = hal_reo_status_update_li;
+	hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_li;
 }

hal/wifi3.0/li/hal_li_hw_headers.h

@@ -30,5 +30,20 @@
 #else
 #include "wfss_ce_reg_seq_hwioreg.h"
 #endif /* QCA_WIFI_QCA6490 */
+#include <reo_descriptor_threshold_reached_status.h>
+#include <reo_flush_queue.h>
+#include <reo_flush_timeout_list_status.h>
+#include <reo_unblock_cache.h>
+#include <reo_flush_cache.h>
+#include <reo_flush_queue_status.h>
+#include <reo_get_queue_stats.h>
+#include <reo_unblock_cache_status.h>
+#include <reo_flush_cache_status.h>
+#include <reo_flush_timeout_list.h>
+#include <reo_get_queue_stats_status.h>
+#include <reo_update_rx_reo_queue.h>
+#include <reo_update_rx_reo_queue_status.h>
+#include <tlv_tag_def.h>
+
 
 #endif /* _HAL_LI_HW_INTERNAL_H_ */

hal/wifi3.0/li/hal_li_reo.c

@@ -192,7 +192,8 @@ void hal_reo_qdesc_setup_li(hal_soc_handle_t hal_soc_hdl, int tid,
 			   UNIFORM_DESCRIPTOR_HEADER_0, RESERVED_0A,
 				   0xCDBEEF);
 }
-qdf_export_symbol(hal_reo_qdesc_setup);
+
+qdf_export_symbol(hal_reo_qdesc_setup_li);
 
 /**
  * hal_get_ba_aging_timeout_li - Get BA Aging timeout
@@ -1348,3 +1349,8 @@ hal_reo_rx_update_queue_status_li(hal_ring_desc_t ring_desc,
 				  HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV,
 				  &(st->header), hal_soc);
 }
+
+uint8_t hal_get_tlv_hdr_size_li(void)
+{
+	return sizeof(struct tlv_32_hdr);
+}

hal/wifi3.0/li/hal_li_reo.h

@@ -75,4 +75,5 @@ hal_reo_rx_update_queue_status_li(hal_ring_desc_t ring_desc,
 void hal_reo_init_cmd_ring_li(hal_soc_handle_t hal_soc_hdl,
 			      hal_ring_handle_t hal_ring_hdl);
 
+uint8_t hal_get_tlv_hdr_size_li(void);
 #endif /* _HAL_LI_REO_H_ */

hal/wifi3.0/li/hal_li_rx.h

@@ -256,8 +256,6 @@ struct rx_pkt_hdr_tlv {
 	char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN];	/* 120 B */
 };
 
-#define RXDMA_OPTIMIZATION
-
 /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status
  * buffers, monitor destination buffers and monitor descriptor buffers.
  */
@@ -358,35 +356,17 @@ struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs)
 	return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
 }
 
-/**
- * hal_rx_mon_dest_set_buffer_info_to_tlv(): Save the mon dest frame info
- *      into the reserved bytes of rx_tlv_hdr.
- * @buf: start of rx_tlv_hdr
- * @buf_info: hal_rx_mon_dest_buf_info structure
- *
- * Return: void
- */
-static inline void hal_rx_mon_dest_set_buffer_info_to_tlv(
-		uint8_t *buf,
-		struct hal_rx_mon_dest_buf_info *buf_info)
-{
-	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
-
-	qdf_mem_copy(pkt_tlvs->rx_padding0, buf_info,
-		     sizeof(struct hal_rx_mon_dest_buf_info));
-}
-
 /**
  * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info
- *      from the reserved bytes of rx_tlv_hdr.
+ * from the reserved bytes of rx_tlv_hdr.
  * @buf: start of rx_tlv_hdr
  * @buf_info: hal_rx_mon_dest_buf_info structure
  *
  * Return: void
  */
 static inline void hal_rx_mon_dest_get_buffer_info_from_tlv(
-		uint8_t *buf,
-		struct hal_rx_mon_dest_buf_info *buf_info)
+				uint8_t *buf,
+				struct hal_rx_mon_dest_buf_info *buf_info)
 {
 	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
 
@@ -775,25 +755,6 @@ hal_rx_attn_msdu_get_is_decrypted(uint8_t *buf)
 		RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)),	\
 		RX_MSDU_END_2_KEY_ID_OCTET_MASK,	\
 		RX_MSDU_END_2_KEY_ID_OCTET_LSB))
-/*
- * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet
- * from rx_msdu_end
- *
- * @buf: pointer to the start of RX PKT TLV header
- * Return: uint32_t(key id)
- */
-
-static inline uint32_t
-hal_rx_msdu_get_keyid(uint8_t *buf)
-{
-	struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
-	struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
-	uint32_t keyid_octet;
-
-	keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
-
-	return keyid_octet & 0x3;
-}
 
 #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start)	\
 	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start,  \
@@ -925,32 +886,6 @@ hal_rx_mpdu_end_mic_err_get(uint8_t *buf)
  * RX REO ERROR APIS
  ******************************************************************************/
 
-/**
- * hal_rx_msdu_reo_dst_ind_get: Gets the REO
- * destination ring ID from the msdu desc info
- *
- * @msdu_link_desc : Opaque cookie pointer used by HAL to get to
- * the current descriptor
- *
- * Return: dst_ind (REO destination ring ID)
- */
-static inline uint32_t
-hal_rx_msdu_reo_dst_ind_get(hal_soc_handle_t hal_soc_hdl, void *msdu_link_desc)
-{
-	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
-	struct rx_msdu_details *msdu_details;
-	struct rx_msdu_desc_info *msdu_desc_info;
-	struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc;
-	uint32_t dst_ind;
-
-	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);
-
-	/* The first msdu in the link should exsist */
-	msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[0],
-						       hal_soc);
-	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
-	return dst_ind;
-}
 
 #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
 		(REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \
@@ -1004,6 +939,17 @@ void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc,
 	HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \
 	wbm_desc)->released_buff_or_desc_addr_info)
 
+static inline
+uint32_t
+HAL_RX_DESC_GET_DECAP_FORMAT(void *hw_desc_addr) {
+	struct rx_msdu_start *rx_msdu_start;
+	struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
+
+	rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
+
+	return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
+}
+
 /**
  * hal_rx_dump_rx_attention_tlv: dump RX attention TLV in structured
  *				 humman readable format.
@@ -1256,6 +1202,58 @@ static inline uint32_t hal_rx_attn_msdu_done_get_li(uint8_t *buf)
 	return msdu_done;
 }
 
+#define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \
+	(HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \
+	HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr))
+
+/**
+ * hal_rx_msdu_flags_get_li() - Get msdu flags from ring desc
+ * @msdu_desc_info_hdl: msdu desc info handle
+ *
+ * Return: msdu flags
+ */
+static inline
+uint32_t hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)
+{
+	struct rx_msdu_desc_info *msdu_desc_info =
+		(struct rx_msdu_desc_info *)msdu_desc_info_hdl;
+
+	return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info);
+}
+
+/*
+ *hal_rx_msdu_desc_info_get_li: Gets the flags related to MSDU descriptor.
+ *@desc_addr: REO ring descriptor addr
+ *@msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
+ *
+ * Specifically flags needed are: first_msdu_in_mpdu,
+ * last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
+ * sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
+ *
+
+ *Return: void
+ */
+static inline void
+hal_rx_msdu_desc_info_get_li(void *desc_addr,
+			     struct hal_rx_msdu_desc_info *msdu_desc_info)
+{
+	struct reo_destination_ring *reo_dst_ring;
+	uint32_t *msdu_info;
+
+	reo_dst_ring = (struct reo_destination_ring *)desc_addr;
+
+	msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
+	msdu_desc_info->msdu_flags =
+		hal_rx_msdu_flags_get_li((struct rx_msdu_desc_info *)msdu_info);
+	msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
+}
+
 #define HAL_RX_MSDU_START_NSS_GET(_rx_msdu_start)		\
 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),	\
 	RX_MSDU_START_5_NSS_OFFSET)),				\

hal/wifi3.0/qca5018/hal_5018.c

@@ -117,8 +117,8 @@
 
 #define HOST_CE_MASK_VALUE 0xFF000000
 
-#include <hal_5018_tx.h>
-#include <hal_5018_rx.h>
+#include "hal_5018_tx.h"
+#include "hal_5018_rx.h"
 #include <hal_generic_api.h>
 #include "hal_li_rx.h"
 #include "hal_li_api.h"

hal/wifi3.0/qca8074v1/hal_8074v1.c

@@ -106,6 +106,7 @@
 #include "hal_8074v1_rx.h"
 #include <hal_generic_api.h>
 #include "hal_li_rx.h"
+#include "hal_li_tx.h"
 #include "hal_li_api.h"
 #include "hal_li_generic_api.h"
 

hal/wifi3.0/qcn6122/hal_qcn6122.c

@@ -116,7 +116,7 @@
 		 (UMAC_WINDOW_ADDRESS_6122 << 12) | \
 		 WINDOW_ENABLE_BIT)
 
-#include <hal_qcn6122_tx.h>
+#include "hal_qcn6122_tx.h"
 #include <hal_generic_api.h>
 #include "hal_li_rx.h"
 #include "hal_li_api.h"

hal/wifi3.0/qcn9000/hal_9000.c

@@ -117,8 +117,7 @@
 		 (UMAC_WINDOW_ADDRESS_9000 << 12) | \
 		 WINDOW_ENABLE_BIT)
 
-#include <hal_9000_tx.h>
-#include <hal_9000_rx.h>
+#include "hal_9000_tx.h"
 #include <hal_generic_api.h>
 #include "hal_li_rx.h"
 #include "hal_li_api.h"

hal/wifi3.0/wcn7850/hal_7850.c

@@ -31,7 +31,6 @@
 #include "hal_flow.h"
 #include "rx_flow_search_entry.h"
 #include "hal_rx_flow_info.h"
-
 #include "hal_be_api.h"
 
 #define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_OFFSET \