disp: msm: dsi: rework DSI PLL to be configured within PHY

Change avoids clock framework APIs to configure the DSI PHY
PLL. It follows HW recommendation to set the byte and pclk
dividers.

Change-Id: I8c110f3997e4ec4c2eaa28778b70091855725ab8
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>

msm/dsi/dsi_phy_hw.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _DSI_PHY_HW_H_
@@ -47,6 +47,18 @@ enum dsi_phy_version {
 	DSI_PHY_VERSION_MAX
 };
 
+/**
+ * enum dsi_pll_version - DSI PHY PLL version enumeration
+ * @DSI_PLL_VERSION_5NM:        5nm PLL
+ * @DSI_PLL_VERSION_10NM:	10nm PLL
+ * @DSI_PLL_VERSION_UNKNOWN:	Unknown PLL version
+ */
+enum dsi_pll_version {
+	DSI_PLL_VERSION_5NM,
+	DSI_PLL_VERSION_10NM,
+	DSI_PLL_VERSION_UNKNOWN
+};
+
 /**
  * enum dsi_phy_hw_features - features supported by DSI PHY hardware
  * @DSI_PHY_DPHY:        Supports DPHY
@@ -344,6 +356,23 @@ struct dsi_phy_hw_ops {
 	void *timing_ops;
 	struct phy_ulps_config_ops ulps_ops;
 	struct phy_dyn_refresh_ops dyn_refresh_ops;
+
+	/**
+	 * configure() - Configure the DSI PHY PLL
+	 * @pll:	 Pointer to DSI PLL.
+	 * @commit:      boolean to specify if calculated PHY configuration
+			 needs to be committed. Set to false in case of
+			 dynamic clock switch.
+	 */
+	int (*configure)(void *pll, bool commit);
+
+	/**
+	 * pll_toggle() - Toggle the DSI PHY PLL
+	 * @pll:	  Pointer to DSI PLL.
+	 * @prepare:	  specify if PLL needs to be turned on or off.
+	 */
+	int (*pll_toggle)(void *pll, bool prepare);
+
 };
 
 /**