Jerome Brunet 1f737ffa13 clk: meson: mpll: fix mpll0 fractional part ignored ...

mpll0 clock is special compared to the other mplls. It needs another
bit (ssen) to be set to activate the fractional part the mpll divider

Fixes: 007e6e5c5f ("clk: meson: mpll: add rw operation")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

2017-08-01 14:18:31 +02:00

6.7 KiB

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