Bjorn Helgaas e5adf79a1d PCI/ATS: Cache PRI PRG Response PASID Required bit ...

The PRG Response PASID Required bit in the PRI Capability is read-only.
Read it once when we enumerate the device and cache the value so we don't
need to read it again.

Based-on-patch-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

2019-10-15 16:39:10 -05:00

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