Files
android_kernel_xiaomi_sm8450/arch/arm/mm/cache-feroceon-l2.c
Nicolas Pitre 72bc2b1ad6 [ARM] 5329/1: Feroceon: fix feroceon_l2_inv_range
Same fix as commit c7cf72dcad: when 'start' and 'end' are less than a
cacheline apart and 'start' is unaligned we are done after cleaning and
invalidating the first cacheline.

Cc: <stable@kernel.org>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-11-08 23:08:54 +00:00

7.4 KiB