b3fddd5b10
To Frac pll, the gate shift is 13, however to Int PLL the gate shift
is 11.
Cc: <stable@vger.kernel.org>
Fixes: ba5625c3e2 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
42 KiB
42 KiB