Jerome Brunet 05f814402d clk: meson: add fdiv clock gates ...

Fdiv fixed dividers clocks of the fixed_pll can actually gate
independently. We never had an issue so far because these clocks
were provided 'enabled' by the bootloader.

Add these gates to enable/disable the clocks when required.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

2018-03-13 10:09:58 +01:00

3.8 KiB

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