Sebastian Ott 414cbd1e3d s390/airq: provide cacheline aligned ivs ...

Provide the ability to create cachesize aligned interrupt vectors.
These will be used for per-CPU interrupt vectors.

Signed-off-by: Sebastian Ott <sebott@linux.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>

2019-04-29 10:47:01 +02:00

7.5 KiB

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