Files
android_kernel_xiaomi_sm8450/drivers/spi/spi-dw-mid.c
Andy Shevchenko d9c14743a3 spi: dw-mid: get a proper clock frequency for SPI2
The clock information is being kept in the custom register on Intel MID
platforms. Each controller has its own dedicated custom register for that.
Thus, to get a proper frequency we have to read value from the specific offset
to the register block. This patch makes this happen.

Fixes: d58cf5ff65 (spi: dw-pci: describe Intel MID controllers better)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-01-27 12:04:29 +00:00

6.7 KiB