Roger Quadros 1d1bae7250 phy: ti-pipe3: Fix PCIe power up sequence ...

TRM [1] mentions that we need to power up
PCIESS_PHY_TX and PCIESS_PHY_RX before configuring
PCIe_PHY_RX SCP settings.

See "Table 26-81. PCIePHY Subsystem Low-Level Programming Sequence".

[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

2019-04-17 14:13:07 +05:30

25 KiB

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