Thierry Reding e32faa303f PCI: tegra: Remove misleading PHYS_OFFSET ...

BARs are disabled when the size register is 0, so it's misleading to write
a base address into the start register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

2016-03-08 15:42:56 -06:00

53 KiB

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