Catalin Marinas 23107c5420 ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4) ...

The L2x0 cache controllers need to explicitly drain their write buffer
even for Normal Noncacheable memory accesses.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2010-03-25 21:13:50 +00:00

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