Florian Fainelli fb8a0b80c4 bus: brcmstb_gisb: Add support for breakpoint interrupts ...

GISB breakpoint interrupts can be raised when a breakpoint has been
enabled to match a specific master and/or GISB register address. Being
able to print a message, similar to those done during target abort or
timeout greatly helps debug systems.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

2020-09-06 20:10:44 -07:00

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