yangbo lu a627f025eb mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a ...

The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

2017-04-28 14:53:13 +02:00

23 KiB

Raw Blame History

View Raw