Files
android_kernel_xiaomi_sm8450/drivers/pci/hotplug/pciehp.h
Bjorn Helgaas d537a3abb4 PCI: pciehp: Reduce PCIe slot_ctrl to 16 bits
4283c70e91 ("PCI: pciehp: Make pcie_wait_cmd() self-contained") added
a cache of the most recent command written to the Slot Control register.
This register is only 16 bits wide, but the cache ("slot_ctrl") is 32 bits.

Reduce slot_ctrl to a u16 so it matches the register size.  No functional
change.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-12 20:12:29 -06:00

6.2 KiB