Chew, Chiau Ee e61f487fd5 spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI ...

It was observed that after module removal followed by insertion,
the SW mode chipselect is not properly set. Thus causing transfer
failure due to incorrect CS toggling.

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

2014-06-17 15:45:52 +01:00

35 KiB

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