Files
android_kernel_xiaomi_sm8450/drivers/clk/clk-gate.c
Gerhard Sittig aa514ce34b clk: wrap I/O access for improved portability
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals

wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms

Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-08-27 17:50:38 -07:00

4.0 KiB