The __ASM_* macros (e.g. __ASM_DX) are used to return the proper
register name (e.g. edx for 32bit / rdx for 64bit). We want to use
this also in arch/x86/include/asm/uaccess.h / get_user() . For this
to work, we need a raw form as both gcc and clang choke on the
whitespace in a register asm() statement, and the __ASM_FORM macro
surrounds the argument with blanks. A new macro, __ASM_FORM_RAW was
added and we change __ASM_REG to use the new RAW form.
Signed-off-by: Jan-Simon Möller <dl9pf@gmx.de>
Link: http://lkml.kernel.org/r/1377803585-5913-2-git-send-email-dl9pf@gmx.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
From Kukjin Kim:
Remove exynos4_defconfig because,
- No more used after disabling exynos non-DT
- exynos_defconfig can support exynos SoCs
* tag 'samsung-defconfig-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: exynos4_defconfig: remove obsolete exynos4_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
From Haojian Zhuang:
Move irq driver out of mach-mmp to support multiplatform
* tag 'mmp-irq' of git://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux:
irqchip: mmp: avoid to include irqs head file
ARM: mmp: avoid to include head file in mach-mmp
irqchip: mmp: support irqchip
irqchip: move mmp irq driver
From Linus Walleij:
Ux500 core changes for ARM SoC:
- Cleanup from Julia Lawall
- Clean out old pin definitions
- Fix the I2C devices
* tag 'ux500-core-for-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: fix up the I2C devices
ARM: ux500: delete oldschool pin defines
arch/arm/mach-ux500/cpu-db8500.c: Avoid using ARRAY_AND_SIZE(e) as a function argument
ARM: ux500: set coherent_dma_mask for dma40
ARM: ux500: remove u8500_secondary_startup from INIT section.
ARM: ux500: add restart support via prcmu
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARCH_SUPPORTS_MSI symbol was removed during the recent patches that
introduce the MSI chip infrastructure. Drop it from the list of selected
symbols. While at it, move the MIGHT_HAVE_PCI symbol so the list stays
sorted alphabetically.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Christian Daudt, SoC changes for Broadcom.
* 'armsoc/for-3.12/soc' of git://github.com/broadcom/bcm11351: (673 commits)
ARM: bcm: Make secure API call optional
ARM: DT: binding fixup to align with vendor-prefixes.txt (drivers)
ARM: mmc: fix NONREMOVABLE test in sdhci-bcm-kona
ARM: bcm: Rename board_bcm
mmc: sdhci-bcm-kona: make linker-section warning go away
ARM: configs: disable DEBUG_LL in bcm_defconfig
ARM: bcm281xx: Board specific reboot code
ARM bcm281xx: Turn on socket & network support.
ARM: bcm281xx: Turn on L2 cache.
+ Linux 3.11-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
From Jason Cooper:
mvebu msi pci changes for v3.12
- introduce support for MSI on PCI
- fix s390 build breakage when !HAVE_GENERIC_HARDIRQS
NOTE: This branch is a dependency for changes going though arm-soc from both
Thomas Petazzoni and Thierry Reding.
* tag 'msi-3.12' of git://git.infradead.org/linux-mvebu:
PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms
ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci
of: pci: add registry of MSI chips
PCI: Introduce new MSI chip infrastructure
PCI: remove ARCH_SUPPORTS_MSI kconfig option
PCI: use weak functions for MSI arch-specific functions
Signed-off-by: Olof Johansson <olof@lixom.net>
From Jason Cooper:
mvebu dt changes for v3.12
- kirkwood
- add ZyXEL NSA310 board, fan for ReadyNAS Duo v2
- mvebu
- add ReadyNAS 102 board
- misc dts updates and changes.
v2:
- dropped mv64xxx-i2c change
* tag 'dt-3.12' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Fix the Armada 370/XP timer compatible strings
ARM: mvebu: use dts pre-processor for readynas 102
ARM: kirkwood: use dts pre-processor for nsa310 boards
ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells
ARM: Kirkwood: Add support for another ZyXEL NSA310 variant
ARM: mvebu: Add Netgear ReadyNAS 102 board
arm: kirkwood: readynas duo v2: Add GMT G762 Fan Controller
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/boot/dts/kirkwood-nsa310.dts
we don't need nr_irqs in machine any more after we move to
linear irqdomain for sirfsoc irqchip, so drop them.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The legacy S3C-DMA API required every period of a cyclic buffer to be
queued separately. After conversion of Samsung ASoC to Samsung DMA
wrappers somebody made an assumption that the same is needed for DMA
engine API, which is not true.
In effect, Samsung ASoC DMA code was queuing the whole cyclic buffer
multiple times with a shift of one period per iteration, leading to:
a) severe memory waste - up to 13x times more DMA transfer descriptors
are allocated than needed,
b) possible memory corruption, because further cyclic buffers were out
of the original buffers, due to the offset.
This patch fixes this problem by making the legacy S3C-DMA API use the
same semantics as DMA engine (the whole cyclic buffer is enqueued at
once) and modifying users of Samsung DMA wrappers in cyclic mode to
behave appropriately.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
The DPI and SDI platform devices are currently created with the ID of
-1. The ID doesn't currently affect anything.
However, we have added regulator supply entries for "omapdss_dpi.0" and
"omapdss_sdi.0" to the board files, although these supply entries are
not yet used. As the ID used for the devices is -1, these regulator
supply entries will not work.
To fix the issue, assign ID of 0 to the devices. In the future there may
be more than one DPI or SDI output, so it makes sense to have a proper
ID for them.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit@ti.com>
The current ARC VM code has 13 flags in Page Table entry: some software
(accesed/dirty/non-linear-maps) and rest hardware specific. With 8k MMU
page, we need 19 bits for addressing page frame so remaining 13 bits is
just about enough to accomodate the current flags.
In MMUv4 there are 2 additional flags, SZ (normal or super page) and WT
(cache access mode write-thru) - and additionally PFN is 20 bits (vs. 19
before for 8k). Thus these can't be held in current PTE w/o making each
entry 64bit wide.
It seems there is some scope of compressing the current PTE flags (and
freeing up a few bits). Currently PTE contains fully orthogonal distinct
access permissions for kernel and user mode (Kr, Kw, Kx; Ur, Uw, Ux)
which can be folded into one set (R, W, X). The translation of 3 PTE
bits into 6 TLB bits (when programming the MMU) can be done based on
following pre-requites/assumptions:
1. For kernel-mode-only translations (vmalloc: 0x7000_0000 to
0x7FFF_FFFF), PTE additionally has PAGE_GLOBAL flag set (and user
space entries can never be global). Thus such a PTE can translate
to Kr, Kw, Kx (as appropriate) and zero for User mode counterparts.
2. For non global entries, the PTE flags can be used to create mirrored
K and U TLB bits. This is true after commit a950549c67
"ARC: copy_(to|from)_user() to honor usermode-access permissions"
which ensured that user-space translations _MUST_ have same access
permissions for both U/K mode accesses so that copy_{to,from}_user()
play fair with fault based CoW break and such...
There is no such thing as free lunch - the cost is slightly infalted
TLB-Miss Handlers.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* reduce editor lines taken by pt_regs
* ARCompact ISA specific part of TLB Miss handlers clubbed together
* cleanup some comments
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
The last remaining use for the storage key of the s390 architecture
is reference counting. The alternative is to make page table entries
invalid while they are old. On access the fault handler marks the
pte/pmd as young which makes the pte/pmd valid if the access rights
allow read access. The pte/pmd invalidations required for software
managed reference bits cost a bit of performance, on the other hand
the RRBE/RRBM instructions to read and reset the referenced bits are
quite expensive as well.
Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Merged in this to avoid conflicts with the big locking fixes
from upstream.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Conflicts:
drivers/pinctrl/pinctrl-sunxi.c
Let's follow the ratified DT binding and use uartdm instead of
hsuart. This does break backwards compatibility but this
shouldn't be a problem because the uart driver isn't probing on
these devices without adding clock support (which isn't merged so
far).
Cc: David Brown <davidb@codeaurora.org>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This reworks kvmppc_mmu_book3s_64_xlate() to make it check the large
page bit in the hashed page table entries (HPTEs) it looks at, and
to simplify and streamline the code. The checking of the first dword
of each HPTE is now done with a single mask and compare operation,
and all the code dealing with the matching HPTE, if we find one,
is consolidated in one place in the main line of the function flow.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Most architectures use the same implementation. Collapse the common ones
into a single weak function that can be overridden.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
From Lorenzo Pieralisi:
This patch series contains:
- GIC driver update to add a method to disable the GIC CPU IF
- TC2 MCPM update to add GIC CPU disabling to suspend method
- TC2 CPU idle big.LITTLE driver
* cpuidle/biglittle:
cpuidle: big.LITTLE: vexpress-TC2 CPU idle driver
ARM: vexpress: tc2: disable GIC CPU IF in tc2_pm_suspend
drivers: irq-chip: irq-gic: introduce gic_cpu_if_down()
ARM: vexpress/TC2: implement PM suspend method
ARM: vexpress/TC2: basic PM support
ARM: vexpress: Add SCC to V2P-CA15_A7's device tree
ARM: vexpress/TC2: add Serial Power Controller (SPC) support
ARM: vexpress/dcscb: fix cache disabling sequences
Signed-off-by: Olof Johansson <olof@lixom.net>
To prevent cores from exiting wfi when they are about to be shut down
the GIC CPU IF must be disabled so that the GIC CPU IF IRQ output line
is not asserted to the cores. wfi completion must be prevented since,
in absence of coordinating HW logic, if the power controller receives
a standbywfi signal but in the meantime the processor restarts executing
owing to a pending IRQ, the core might be reset when running in a
non-quiescent state (eg with pending load/store transactions)
Raw GIC distributor IRQ signals are routed to the power controller, that
is capable of taking core out of reset on pending IRQs even if their GIC
CPU IF is disabled, thus keeping the normal wfi behaviour.
GIC CPU IF is restored upon CPU wake-up by the respective MCPM API
consumers (ie CPU idle driver and suspend to RAM thread).
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman:
Renesas ARM based SoC SMP updates for v3.12
* Per-CPU SMP boot and sleep code on SoCs that use SCU
* Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs
* Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs
* tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
ARM: shmobile: Introduce per-CPU SMP boot / sleep code
ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
ARM: shmobile: Add shared SCU CPU Hotplug code
ARM: shmobile: Use shared SCU SMP boot code on emev2
ARM: shmobile: Use shared SCU SMP boot code on r8a7779
ARM: shmobile: Use shared SCU SMP boot code on sh73a0
ARM: shmobile: Introduce shared SCU SMP boot code
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman:
Third round of Renesas ARM based SoC cleanups for v3.12
* Remove global GPIO_NR definition from sh73a0 SoC
* Remove unnecessary nfsroot settings from bootargs of
kzm9d and armadillo800eva
* Rename irq initialisation functions of r8a7779 SoC
to make them consistent with other SoCs
* Simplify irq initialisation of r8a7740 SoC
* Add missing __initdata annotations to bockw board, and
r8a7790 and r8a7779 SoCs
* Refactor time initialisation and remove shmobile_init_time.
- This affects the following boards: kzm9g, marzen, ape6evm,
armadillo800eva and bockw
- This affects the following SoCs: r8a7790, r8a7779, r7a7740, r7a73a4
* Cleanup device registration code of r8a7778 SoC
* tag 'renesas-cleanup3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (45 commits)
ARM: shmobile: sh73a0: Remove global GPIO_NR definition
ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
ARM: shmobile: bockw: add missing __initdata
ARM: shmobile: r8a7790: add missing __initdata
ARM: shmobile: r8a7779: add missing __initdata
ARM: shmobile: Remove unused shmobile_init_time()
ARM: shmobile: Use clocksource_of_init() on r8a7790
ARM: shmobile: Use default ->init_time() on KZM9G DT ref
ARM: shmobile: Use default ->init_time() on Marzen DT ref
ARM: shmobile: Use default ->init_time() on APE6EVM DT ref
ARM: shmobile: Use default ->init_time() on APE6EVM
ARM: shmobile: Use default ->init_time() on Armadillo DT ref
ARM: shmobile: Use default ->init_time() on Bockw DT ref
ARM: shmobile: Use default ->init_time() on Bockw
ARM: shmobile: Use default ->init_time() on r8a7779
ARM: shmobile: Use default ->init_time() on r8a7778
ARM: shmobile: Use default ->init_time() on r8a7740
...
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman:
Second round of Renesas ARM based SoC cleanups for v3.12
* Remove mach/hardware.h which has no useful contents
* Remove ag5evm board support
* Remove kota2 board support
* Use pm-rmobile on sh7372 and r8a7740 SoCs only, it is otherwise unneeded
* Remove use of INTC header on r8a7779 and r8a7740 SoCs
* Cleanup registration of usb phy in r8a7779 SoC
* Remove '0x's from R8A7779 DTS file for r8a7779 SoC
* tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (74 commits)
ARM: shmobile: r8a7779: Remove '0x's from R8A7779 DTS file
ARM: shmobile: r8a7779: cleanup registration of usb phy
ARM: shmobile: No need to use INTC header on r8a7779
ARM: shmobile: No need to use INTC demux on r8a7740
ARM: shmobile: Use pm-rmobile on sh7372 and r8a7740 only
ARM: shmobile: r8a73a4: Remove ->init_machine() special case
ARM: shmobile: Remove include <mach/hardware.h>
ARM: shmobile: Remove Marzen use of <mach/hardware.h>
ARM: shmobile: Remove r8a7779 use of <mach/hardware.h>
ARM: shmobile: Remove EMEV2 use of <mach/hardware.h>
ARM: shmobile: Remove sh7372 use of <mach/hardware.h>
ARM: shmobile: Remove sh73a0 use of <mach/hardware.h>
ARCH: ARM: shmobile: Remove ag5evm board support
ARCH: ARM: shmobile: Remove kota2 board support
leds: Remove leds-renesas-tpu driver
ARM: shmobile: sh73a0: Remove all GPIOs
ARM: shmobile: kota2: Use leds-pwm + pwm-rmob
ARM: shmobile: armadillo800eva: Add backlight support
ARM: shmobile: Setup r8a7790 arch timer based on MD pins
ARM: shmobile: Introduce r8a7790_read_mode_pins()
...
Signed-off-by: Olof Johansson <olof@lixom.net>
It turns out that if we exit the guest due to a hcall instruction (sc 1),
and the loading of the instruction in the guest exit path fails for any
reason, the call to kvmppc_ld() in kvmppc_get_last_inst() fetches the
instruction after the hcall instruction rather than the hcall itself.
This in turn means that the instruction doesn't get recognized as an
hcall in kvmppc_handle_exit_pr() but gets passed to the guest kernel
as a sc instruction. That usually results in the guest kernel getting
a return code of 38 (ENOSYS) from an hcall, which often triggers a
BUG_ON() or other failure.
This fixes the problem by adding a new variant of kvmppc_get_last_inst()
called kvmppc_get_last_sc(), which fetches the instruction if necessary
from pc - 4 rather than pc.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently the code assumes that once we load up guest FP/VSX or VMX
state into the CPU, it stays valid in the CPU registers until we
explicitly flush it to the thread_struct. However, on POWER7,
copy_page() and memcpy() can use VMX. These functions do flush the
VMX state to the thread_struct before using VMX instructions, but if
this happens while we have guest state in the VMX registers, and we
then re-enter the guest, we don't reload the VMX state from the
thread_struct, leading to guest corruption. This has been observed
to cause guest processes to segfault.
To fix this, we check before re-entering the guest that all of the
bits corresponding to facilities owned by the guest, as expressed
in vcpu->arch.guest_owned_ext, are set in current->thread.regs->msr.
Any bits that have been cleared correspond to facilities that have
been used by kernel code and thus flushed to the thread_struct, so
for them we reload the state from the thread_struct.
We also need to check current->thread.regs->msr before calling
giveup_fpu() or giveup_altivec(), since if the relevant bit is
clear, the state has already been flushed to the thread_struct and
to flush it again would corrupt it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The offset to add to the hosts monotonic time, kvmclock_offset, is
calculated against the monotonic time at KVM_SET_CLOCK ioctl time.
Request a master clock update at this time, to reduce a potentially
unbounded difference between the values of the masterclock and
the clock value used to calculate kvmclock_offset.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Commit 8e44ddc3f3 ("powerpc/kvm/book3s: Add support for H_IPOLL and
H_XIRR_X in XICS emulation") added a call to get_tb() but didn't
include the header that defines it, and on some configs this means
book3s_xics.c fails to compile:
arch/powerpc/kvm/book3s_xics.c: In function ‘kvmppc_xics_hcall’:
arch/powerpc/kvm/book3s_xics.c:812:3: error: implicit declaration of function ‘get_tb’ [-Werror=implicit-function-declaration]
Cc: stable@vger.kernel.org [v3.10, v3.11]
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
err was overwritten by a previous function call, and checked to be 0. If
the following page allocation fails, 0 is going to be returned instead
of -ENOMEM.
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
'rmls' is 'unsigned long', lpcr_rmls() will return negative number when
failure occurs, so it need a type cast for comparing.
'lpid' is 'unsigned long', kvmppc_alloc_lpid() return negative number
when failure occurs, so it need a type cast for comparing.
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Support for single-step in the emulator (new in 3.12) does not work for
MMIO or PIO writes, because they are completed without returning to
the emulator. This is not worse than what we had in 3.11; still, add
comments so that the issue is not forgotten.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
The map_mem() function limits the current memblock limit to PGDIR_SIZE
(the initial swapper_pg_dir mapping) to avoid create_mapping()
allocating memory from unmapped areas. However, if the first block is
within PGDIR_SIZE and not ending on a PMD_SIZE boundary, when 4K page
configuration is enabled, create_mapping() will try to allocate a pte
page. Such page may be returned by memblock_alloc() from the end of such
bank (or any subsequent bank within PGDIR_SIZE) which is not mapped yet.
The patch limits the current memblock limit to the aligned end of the
first bank and gradually increases it as more memory is mapped. It also
ensures that the start of the first bank is aligned to PMD_SIZE to avoid
pte page allocation for this mapping.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
Tested-by: "Leizhen (ThunderTown, Euler)" <thunder.leizhen@huawei.com>
The old display drivers are no longer used, and will be phased out. So
remove them from the omap2plus_defconfig.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for AM3517EVM board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Note: the management of LCD GPIOs is unclear. They were originally muxed
as inputs, and LCD_PANEL_PWR was labelled as "dvi enable".
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for Zoom board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for OMAP3 Pandora board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for OMAP3EVM board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for 3430SDP board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for H4 board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for cm-t35 board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Use new display drivers for igep0020 board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
