Commit Graph

148306 Commits

Author SHA1 Message Date
Will Deacon
7bd99b4034 arm64: Kconfig: Enable LSE atomics by default
Now that we're seeing CPUs shipping with LSE atomics, default them to
'on' in Kconfig. CPUs without the instructions will continue to use
LDXR/STXR-based sequences, but they will be placed out-of-line by the
compiler.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-05-23 11:33:45 +01:00
Dominik Brodowski
8ecc4979b1 x86/speculation: Simplify the CPU bug detection logic
Only CPUs which speculate can speculate. Therefore, it seems prudent
to test for cpu_no_speculation first and only then determine whether
a specific speculating CPU is susceptible to store bypass speculation.
This is underlined by all CPUs currently listed in cpu_no_speculation
were present in cpu_no_spec_store_bypass as well.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@suse.de
Cc: konrad.wilk@oracle.com
Link: https://lkml.kernel.org/r/20180522090539.GA24668@light.dominikbrodowski.net
2018-05-23 10:55:52 +02:00
Konrad Rzeszutek Wilk
0aa48468d0 KVM/VMX: Expose SSBD properly to guests
The X86_FEATURE_SSBD is an synthetic CPU feature - that is
it bit location has no relevance to the real CPUID 0x7.EBX[31]
bit position. For that we need the new CPU feature name.

Fixes: 52817587e7 ("x86/cpufeatures: Disentangle SSBD enumeration")
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm@vger.kernel.org
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: stable@vger.kernel.org
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lkml.kernel.org/r/20180521215449.26423-2-konrad.wilk@oracle.com
2018-05-23 10:55:52 +02:00
Miquel Raynal
2f872ddcdb arm64: dts: marvell: fix CP110 ICU node size
ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
specification).

Fixes: 6ef84a827c ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-05-23 09:35:53 +02:00
Dan Williams
5d8beee20d x86, nfit_test: Add unit test for memcpy_mcsafe()
Given the fact that the ACPI "EINJ" (error injection) facility is not
universally available, implement software infrastructure to validate the
memcpy_mcsafe() exception handling implementation.

For each potential read exception point in memcpy_mcsafe(), inject a
emulated exception point at the address identified by 'mcsafe_inject'
variable. With this infrastructure implement a test to validate that the
'bytes remaining' calculation is correct for a range of various source
buffer alignments.

This code is compiled out by default. The CONFIG_MCSAFE_DEBUG
configuration symbol needs to be manually enabled by editing
Kconfig.debug. I.e. this functionality can not be accidentally enabled
by a user / distro, it's only for development.

Cc: <x86@kernel.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Reported-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2018-05-22 23:18:31 -07:00
Sebastian Ott
a166c368e7 s390/cio: add test for ccwgroup device
Add a test to check if a given device is a ccwgroup device.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23 08:06:58 +02:00
Sebastian Ott
199652309a s390/cio: add helper to query utility strings per given ccw device
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23 08:06:56 +02:00
Masahiro Yamada
1c21765cb3 s390: remove no-op macro VMLINUX_SYMBOL()
VMLINUX_SYMBOL() is no-op unless CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX
is defined.  It has ever been selected only by BLACKFIN and METAG.
VMLINUX_SYMBOL() is unneeded for s390-specific code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23 08:06:55 +02:00
Vincent Chen
a30e7d1e37 nds32: Fix compiler warning, Wstringop-overflow, in vdso.c
Getting a compiler warning, Wstringop-overflow, in
arch/nds32/kernel/vdso.c when kernel is built by gcc-8. Declaring
vdso_start and vdso_end as a pointer to fix this compiler warning.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Vincent Chen
aaaaba5750 nds32: Disable local irq before calling cpu_dcache_wb_page in copy_user_highpage
In order to ensure that all data in source page has been written back
to memory before copy_page, the local irq shall be disabled before
calling cpu_dcache_wb_page(). In addition, removing unneeded page
invalidation for 'to' page.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Vincent Chen
5b9f95699b nds32: Flush the cache of the page at vmaddr instead of kaddr in flush_anon_page
According to Documentation/cachetlb.txt, the cache of the page at vmaddr
shall be flushed in flush_anon_page instead of the cache of the page at
page_address(page).

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Vincent Chen
efcc4ea872 nds32: Correct flush_dcache_page function
1. Disable local irq before d-cache write-back and invalidate.
   The cpu_dcache_wbinval_page function is composed of d-cache
write-back and invalidate. If the local irq is enabled when calling
cpu_dcache_wbinval_page, the content of d-cache is possibly updated
between write-back and invalidate. In this case, the updated data will
be dropped due to the following d-cache invalidation. Therefore, we
disable the local irq before calling cpu_dcache_wbinval_page.

2. Correct the data write-back for page aliasing case.
   Only the page whose (page->index << PAGE_SHIFT) is located at the
same page color as page_address(page) needs to execute data write-back
in flush_dcache_page function.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Nickhu
1613de8a78 nds32: Fix the unaligned access handler
If the kernel config 'CONFIG_ALIGNMENT_TRAP' and the file
'/proc/sys/nds32/unaligned_access/enable' are set, the kernel
unaligned access handler does not handle correctly when the
value of immediate field is negative. This commit fixes the
unaligned access handler in kernel.

Signed-off-by: Nickhu <nickhu@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Nickhu
b3a75846a5 nds32: Renaming the file for unaligned access
Change the name of the file '/proc/sys/nds32/unaligned_acess'
to '/proc/sys/nds32/unaligned_access'

Signed-off-by: Nickhu <nickhu@andestech.com>
Reviewed-by: Greentime Hu <greentime@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Greentime Hu
abb90a24ea nds32: To fix a cache inconsistency issue by setting correct cacheability of NTC
The nds32 architecture will use physical memory when interrupt or
exception comes and it will use the setting of NTC0-4. The original
implementation didn't consider the DRAM start address may start from 1GB,
2GB or 3GB to cause this issue. It will write the data to DRAM if it is
running in physical address however kernel will read the data with
virtaul address through data cache. In this case, the data of DRAM is
latest.

This fix will set the correct cacheability to let kernel write/read the
latest data in cache instead of DRAM.

Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:22 +08:00
Greentime Hu
8769c22349 nds32: To refine readability of INT_MASK_INITAIAL_VAL
Refine readability of INT_MASK_INITAIAL_VAL with meaningful macro instead
of magic number.

Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:21 +08:00
Greentime Hu
3ff2228dce nds32: Fix the virtual address may map too much range by tlbop issue.
We use tlbop to map virtual address in the first beginning, however it
may map too much if DRAM size is not that big. We have to invalidate the
mapping when the page table is created.

Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:21 +08:00
Greentime Hu
b3b112bb06 nds32: Fix the allmodconfig build. To make sure CONFIG_CPU_LITTLE_ENDIAN is default y
This way we can build kernel with CONFIG_CPU_LITTLE_ENDIAN=y. Build allmodconfig
and allnoconfig are available too. It also fixes the endian mismatch issue
because AFLAGS and LDFLAGS is not passed correctly.

Signed-off-by: Vincent Ren-Wei Chen <vincentc@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23 13:26:21 +08:00
Greentime Hu
c8c20f9c16 nds32: Fix build failed because arch_trace_hardirqs_off is changed to trace_hardirqs_off.
It broke the 'allmodconfig' build when CONFIG_TRACE_IRQFLAGS is enabled.

Signed-off-by: Nick Chun-Ming Hu <nickhu@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:21 +08:00
Greentime Hu
bb912671e3 nds32: Fix the unknown type u8 issue.
It broke the 'allmodconfig' build.
We need to include <linux/types.h> to make sure the type is defined
before using it.

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:21 +08:00
Greentime Hu
e3f4624388 nds32: Fix the symbols undefined issue by exporting them.
It broke the 'allmodconfig' build.
  LD      vmlinux
  SYSMAP  System.map
  Building modules, stage 2.
  MODPOST 5028 modules
ERROR: "flush_dcache_page" [net/sunrpc/xprtrdma/rpcrdma.ko] undefined!
ERROR: "empty_zero_page" [net/ceph/libceph.ko] undefined!
ERROR: "save_stack_trace" [kernel/backtracetest.ko] undefined!
ERROR: "clear_page" [fs/ocfs2/dlm/ocfs2_dlm.ko] undefined!
ERROR: "copy_page" [fs/nilfs2/nilfs2.ko] undefined!
...

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Greentime Hu
03969d0b3a nds32: Fix xfs_buf built failed by export invalidate_kernel_vmap_range and flush_kernel_vmap_range
It broke the 'allmodconfig' build.
fs/xfs/xfs_buf.c: In function 'xfs_buf_bio_end_io':
fs/xfs/xfs_buf.c:1242:3: error: implicit declaration of function 'invalidate_kernel_vmap_range' [-Werror=implicit-function-declaration]
   invalidate_kernel_vmap_range(bp->b_addr, xfs_buf_vmap_len(bp));
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
fs/xfs/xfs_buf.c: In function 'xfs_buf_ioapply_map':
fs/xfs/xfs_buf.c:1312:4: error: implicit declaration of function 'flush_kernel_vmap_range' [-Werror=implicit-function-declaration]
    flush_kernel_vmap_range(bp->b_addr,
    ^~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Greentime Hu
8cedb78fdf nds32: Fix drivers/gpu/drm/udl/udl_fb.c building error by defining PAGE_SHARED
It broke the 'allmodconfig' build.
drivers/gpu/drm/udl/udl_fb.c: In function 'udl_fb_mmap':
drivers/gpu/drm/udl/udl_fb.c:183:52: error: 'PAGE_SHARED' undeclared (first use in this function)
   if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))
                                                    ^~~~~~~~~~~
drivers/gpu/drm/udl/udl_fb.c:183:52: note: each undeclared identifier is reported only once for each function it appears in
make[4]: *** [drivers/gpu/drm/udl/udl_fb.o] Error 1

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Greentime Hu
81560e011a nds32: Fix building error of crypto/xor.c by adding xor.h
When I compiled with allmodconfig, it caused this building failed.
crypto/xor.c:25:21: fatal error: asm/xor.h: No such file or directory
 #include <asm/xor.h>
                     ^
compilation terminated.

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Greentime Hu
6ca4b262db nds32: Fix building error when CONFIG_FREEZE is enabled.
To include kernel/Kconfig.freezer to make sure the dependency between
CONFIG_CGROUP_FREEZER and CONFIG_FREEZER

It will cause building error when I make allmodconfig.

kernel/cgroup/freezer.c: In function 'freezer_css_online':
kernel/cgroup/freezer.c:116:15: error: 'system_freezing_cnt' undeclared (first use in this function)
   atomic_inc(&system_freezing_cnt);
               ^~~~~~~~~~~~~~~~~~~
kernel/cgroup/freezer.c:116:15: note: each undeclared identifier is reported only once for each function it appears in
kernel/cgroup/freezer.c: In function 'freezer_css_offline':
kernel/cgroup/freezer.c:137:15: error: 'system_freezing_cnt' undeclared (first use in this function)
   atomic_dec(&system_freezing_cnt);
               ^~~~~~~~~~~~~~~~~~~
kernel/cgroup/freezer.c: In function 'freezer_attach':
kernel/cgroup/freezer.c:181:4: error: implicit declaration of function 'freeze_task' [-Werror=implicit-function-declaration]
    freeze_task(task);
    ^~~~~~~~~~~
kernel/cgroup/freezer.c: In function 'freezer_apply_state':
kernel/cgroup/freezer.c:360:16: error: 'system_freezing_cnt' undeclared (first use in this function)
    atomic_inc(&system_freezing_cnt);
                ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Greentime Hu
aeaa7af744 nds32: lib: To use generic lib instead of libgcc to prevent the symbol undefined issue.
We can use the generic lib to fix these error because the symbol of
libgcc in toolchain is not exported.

ERROR: "__ucmpdi2" [fs/xfs/xfs.ko] undefined!
ERROR: "__ashrdi3" [fs/xfs/xfs.ko] undefined!
ERROR: "__lshrdi3" [fs/xfs/xfs.ko] undefined!
ERROR: "__ashldi3" [fs/ntfs/ntfs.ko] undefined!
...

Signed-off-by: Greentime Hu <greentime@andestech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23 13:26:20 +08:00
Bjorn Andersson
57fc67ef0d arm64: dts: qcom: msm8996: Add ufs related nodes
Add the UFS QMP phy node and the UFS host controller node, now that we
have working UFS and the necessary clocks in place.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:03 -05:00
Thierry Escande
242579dd08 arm64: dts: msm8996: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").

Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:02 -05:00
Douglas Anderson
54d7a20d61 arm64: dts: qcom: sdm845: Sort nodes in the soc by address
This is pure-churn and should be a no-op.  I'm doing it in the hopes
of reducing merge conflicts.  When things are sorted in a sane way
(and by base address seems sane) then it's less likely that future
patches will cause merge conflicts.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:02 -05:00
Douglas Anderson
2da5239816 arm64: dts: qcom: sdm845: Sort nodes in the reserved mem by address
Let's keep the reserved-memory node tidy and neat and keep it sorted
by address.  This should have no functional change.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:01 -05:00
Douglas Anderson
b1643b2734 arm64: dts: sdm845: Add command DB node
Add command DB node based on the bindings example.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:01 -05:00
Douglas Anderson
5ea3939cf5 arm64: dts: sdm845: Fix xo_board clock name and speed
The RPMh clock driver assumes that the xo_board clock is named
"xo_board", not "xo-board".  Add a "clock-output-names" property to
the device tree to get the right name.

Also add the proper speed for the xo-clock as 38400000.  This is
internally divided in RPMh clock driver to get "bi_tcxo" at 19200000.

After this change the clock tree in /sys/kernel/debug/clk/clk_summary
looks much better.

NOTES:
- Technically you could argue that this clock could belong in board
  .dts files, not in the SoC one.  However at the moment it's believed
  that 100% of sdm845 boards will have an external clock at 38.4.  It
  can always be moved later if necessary.
- We could rename the "xo-board" device tree node to "xo_board" to
  achieve the same effect as this patch.  Presumably device-tree folks
  would rather keep node names using dashes though.
- We could change the RPMh clock driver to use a dash to achieve the
  same effect as this patch, but all other clocks in the clock tree
  use underscores.  It seems silly to change just this one.

Fixes: 7bafa643647f ("arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:29:00 -05:00
Sibi S
71c8428e48 arm64: dts: qcom: Add SDM845 SMEM nodes
Add all the necessary dt nodes to support SMEM driver
on SDM845. It also adds the required memory carveouts
so that the kernel does not access memory that is in
use.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:59 -05:00
Sibi S
03208ff7bf arm64: dts: qcom: Add APSS shared mailbox node to SDM845
This patch add the node to support APSS shared
mailbox on SDM845

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:59 -05:00
Srinivas Kandagatla
c16e78b8e8 arm64: dts: msm8916: fix gic_irq_domain_translate warnings
Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
patch (83a86fbb5b "irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE").

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Thierry Escande <thierry.escande@linaro.org>
Tested-by: Thierry Escande <thierry.escande@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:54 -05:00
Srinivas Kandagatla
575dc637a9 arm64: dts: apq8096-db820c: Add micro sd card supplies
This patch adds missing microSD card supplies, without this uSD
card will not be detected.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:53 -05:00
Thierry Escande
3e4cb73080 arm64: dts: apq8096-db820c: enable bluetooth node
Add a new serial node for the Qualcomm BT controller QCA6174. This
allows automatic probing and hci registration through the serdev
framework instead of relying on the userspace helpers.

Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:51 -05:00
Srinivas Kandagatla
5360394706 arm64: dts: apq8096-db820c: Enable wlan and bt en pins
This patch enables regulators and gpios for the Qualcomm QCA6174 BT/WLAN
combo controller.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:51 -05:00
Arnd Bergmann
228b9cae76 arm64: dts: qcom: rename qcom,pcie devices to pcie
The node name for a PCIe host bridge must be "pcie" as required by
the binging. dtc now warns about it:

arch/arm64/boot/dts/qcom/apq8096-db820c.dtb: Warning (pci_bridge): /soc/agnoc@0/qcom,pcie@610000: node name is not "pci" or "pcie"
arch/arm64/boot/dts/qcom/apq8096-db820c.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge'
arch/arm64/boot/dts/qcom/msm8996-mtp.dtb: Warning (pci_bridge): /soc/agnoc@0/qcom,pcie@610000: node name is not "pci" or "pcie"
arch/arm64/boot/dts/qcom/msm8996-mtp.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge'

This renames the nodes as appropriate.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:50 -05:00
Jeremy McNicoll
0295d4dfa8 arm64: dts: msm8992: add pstore-ramoops support
With the addition of this ramoops node it enables post mortem
analysis if a debug cable is not attached and/or not available.

All addresses and values were extracted from CAF AOSP marshmallow
DR 1.6.

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:49 -05:00
Rajendra Nayak
6d4cf750d0 arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP
Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:49 -05:00
Jeremy McNicoll
f3b2c99e73 arm64: dts: Enable onboard SDHCI on msm8992
This enables SDHCI on the Nexus 5X as well creates common smd_rpm node
which can be shared between both 5X and 6P as per HW design.

Given the lack of documentation, only downstream code was used as a reference
and it eludes to the fact that 8994-rpm-regulator is common between both msm8992
& msm8994.   [ see msm.git branch: msm-angler-3.10-marshmallow-mr1, msm8992.dtsi]

At this early stage of development it makes sense for the 8994-rpm-regulator
to be common until data / documentation suggests otherwise.

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-22 23:28:41 -05:00
Sinan Kaya
92d7223a74 alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2
memory-barriers.txt has been updated with the following requirement.

"When using writel(), a prior wmb() is not needed to guarantee that the
cache coherent memory writes have completed before writing to the MMIO
region."

Current writeX() and iowriteX() implementations on alpha are not
satisfying this requirement as the barrier is after the register write.

Move mb() in writeX() and iowriteX() functions to guarantee that HW
observes memory changes before performing register operations.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2018-05-22 18:10:36 -07:00
Christoph Hellwig
f5e82fa260 alpha: simplify get_arch_dma_ops
Remove the dma_ops indirection.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2018-05-22 18:10:36 -07:00
Christoph Hellwig
6db615431a alpha: use dma_direct_ops for jensen
The generic dma_direct implementation does the same thing as the alpha
pci-noop implementation, just with more bells and whistles.  And unlike
the current code it at least has a theoretical chance to actually compile.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2018-05-22 18:10:36 -07:00
Peter Zijlstra
f64c6013a2 rcu/x86: Provide early rcu_cpu_starting() callback
The x86/mtrr code does horrific things because hardware. It uses
stop_machine_from_inactive_cpu(), which does a wakeup (of the stopper
thread on another CPU), which uses RCU, all before the CPU is onlined.

RCU complains about this, because wakeups use RCU and RCU does
(rightfully) not consider offline CPUs for grace-periods.

Fix this by initializing RCU way early in the MTRR case.

Tested-by: Mike Galbraith <efault@gmx.de>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
[ paulmck: Add !SMP support, per 0day Test Robot report. ]
2018-05-22 16:12:26 -07:00
Peter Maydell
cc19846079 arm64: fault: Don't leak data in ESR context for user fault on kernel VA
If userspace faults on a kernel address, handing them the raw ESR
value on the sigframe as part of the delivered signal can leak data
useful to attackers who are using information about the underlying hardware
fault type (e.g. translation vs permission) as a mechanism to defeat KASLR.

However there are also legitimate uses for the information provided
in the ESR -- notably the GCC and LLVM sanitizers use this to report
whether wild pointer accesses by the application are reads or writes
(since a wild write is a more serious bug than a wild read), so we
don't want to drop the ESR information entirely.

For faulting addresses in the kernel, sanitize the ESR. We choose
to present userspace with the illusion that there is nothing mapped
in the kernel's part of the address space at all, by reporting all
faults as level 0 translation faults taken to EL1.

These fields are safe to pass through to userspace as they depend
only on the instruction that userspace used to provoke the fault:
 EC IL (always)
 ISV CM WNR (for all data aborts)
All the other fields in ESR except DFSC are architecturally RES0
for an L0 translation fault taken to EL1, so can be zeroed out
without confusing userspace.

The illusion is not entirely perfect, as there is a tiny wrinkle
where we will report an alignment fault that was not due to the memory
type (for instance a LDREX to an unaligned address) as a translation
fault, whereas if you do this on real unmapped memory the alignment
fault takes precedence. This is not likely to trip anybody up in
practice, as the only users we know of for the ESR information who
care about the behaviour for kernel addresses only really want to
know about the WnR bit.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2018-05-22 17:14:20 +01:00
Bjorn Helgaas
77edfac4e7 MIPS: PCI: Use dev_printk() when possible
Use the pci_info() and pci_err() wrappers for dev_printk() when possible.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: James Hogan <jhogan@kernel.org>
2018-05-22 07:56:22 -05:00
Bjorn Helgaas
78f7aada6d xtensa/PCI: Use dev_printk() when possible
Use the pci_info() and pci_err() wrappers for dev_printk() when possible.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-22 07:56:17 -05:00
Bjorn Helgaas
f242132bc4 xtensa/PCI: Make variables static
Make these variables static, since they're only used in this file:

  pci_ctrl_head
  pci_ctrl_tail

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-22 07:56:12 -05:00