With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.
In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.
And we cannot yet move mmu_dsp until we have a proper reset controller
driver for rstctrl registers.
In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Before updating wdt2 to probe with ti-sysc we want to have wdt3
probed with ti-sysc to avoid having them unnecessarily swap order.
With ti-sysc, we probe child devices at module_init time while
and until l4 abe interconnect is converted to use ti-sysc, wdt3
will probe earlier with legacy platform data.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's add proper interconnect hierarchy for l4 interconnect
instances with the related ti-sysc interconnect module data as
documented in Documentation/devicetree/bindings/bus/ti-sysc.txt.
Using ti-sysc driver binding allows us to start dropping
legacy platform data in arch/arm/mach-omap2/omap*hwmod*data.c
files later on in favor of ti-sysc dts data.
For setting up a proper hierarchy for the interconnect and
ti-sysc data, there are multiple reasons:
1. We can use dts ranges to protect registers from being
ioremapped from other devices and prevent hard to track
issues with failed flush of posted write between modules
2. Some of the ranges may not be accessible to operating systems
at all if configured so on high-security devices
3. The interconnect hierarchy provides proper clockdomain
hierarchy that can be used for genpd later on
4. We can avoid almost all deferred probe related issues simply
by probing the resource providing interconnect instance first
for l4 wkup instance
5. With deferred probe issues gone, we can probe everything
later at module_init time except for system timer and interrupt
controller and their clocks.
This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.
Each interconnect instance is typically divided into segments
to avoid powering up the whole interconnect. And each segment
has one or more ranges TI specific interconnect target modules
connected to it. Some devices can also have a separate data
access port directly to the parent L3 interconnect for DMA that
can be set up as a separate range.
Note that we cannot yet include this file from omap4.dtsi
until child devices are moved to their proper locations in
the interconnect hierarchy in the following patch. Otherwise
we would have the each module probed twice.
Also note that this does not yet add l4 abe instance, that will
be added separately later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
added "operating-points" property for all CPUs, but i.MX7D already has
"operating-points-v2" property on both CPUs, so no need to add
"operating-points" property again, this patch removes it.
Fixes: b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX fixes for 4.18, round 4:
- A fix for i.MX6 RDU2 board on the wrong IRQ type of Marvell switch,
which might result in a race condition in the interrupt handler and
cause the OS to miss all future events.
* tag 'imx-fixes-4.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The Marvell switches report their interrupts in a level sensitive way.
When using edge sensitive detection a race condition in the interrupt
handler of the swich might result in the OS to miss all future events
which might make the switch non-functional.
The problem is that both mv88e6xxx_g2_irq_thread_fn() and
mv88e6xxx_g1_irq_thread_work() sample the irq cause register
(MV88E6XXX_G2_INT_SRC and MV88E6XXX_G1_STS respectively) once and then
handle the observed sources. If after sampling but before all observed
irq sources are handled a new irq source gets active this is not noticed
by the handler which returns unsuspecting, but the interrupt line stays
active which prevents the edge detector to kick in.
All device trees but imx6qdl-zii-rdu2 get this right (most of them by
not specifying an interrupt parent). So fix imx6qdl-zii-rdu2
accordingly.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: f64992d1a9 ("ARM: dts: imx6: RDU2: Add Switch interrupts")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
One omap dts mismerge fix
The dts patch for droid4 PWM vibrator has added gpio6 entries to the wrong
node. Let's fix it with a note that there seems to be also other GPIO PWM
issues to fix still to get the PWM vibrator working. So this can wait for
v4.19 merge cycle if necessary.
* tag 'omap-for-v4.18/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: fix dts w.r.t. pwm
Signed-off-by: Olof Johansson <olof@lixom.net>
According to the system control bindings, the A3-A4 SRAM node should be
a child node of the SRAM it belongs to. However, it was introduced at the
same level, therefore breaking the binding. Fix this.
Fixes: 8587019625 ("ARM: sun5i: a13: Merge common controllers into the common DTSI")
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
ddress-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Include GPIO dt-bindings and use GPIO_ACTIVE_* constants
to improve readability
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
According to the reference manual, the board has two Micron
MT41K256M16HA-125 DDR3L memory ICs, which have 512 MiB each
Tested on a ZYBO-Z7-20 board
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace the current value of the model property by a more accurate
description of each board (which includes the manufacturer), as some
of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both boards are made by Avnet, Inc. So add an additional
value to the compatible property
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a dts for MYIR Z-turn board and respective target in Makefile.
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The aspeed pwm driver always sets the clock source to 24MHz, specify
the fixed clock in device tree to make sure the driver is using the
correct clock frequency to calculate the fan speed.
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the Ethernet and Realtek switch device to the
D-Link DIR-685 Gemini-based device.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:
* Gigabit capable PHY
* Extra USB hub, optional i2c control
* lps3331ap barometer connected over i2c
* MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
* 1GiB DDR3 RAM
* RTL8723 Wifi/Bluetooth connected over USB
Tested on a revision G board.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are two variants of imx6ul-pico boards: one with 256MB and
another one with 512MB of RAM.
Do not hardcode the memory size in the device tree and let the
bootloader fill the correct value instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SL EVK board, pfuze100 sw4 supplies
LPDDR2 which is critical for system, must be
always on.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, pfuze100 sw4 supplies
LPDDR3 which is critical for system, must be
always on.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SX SDB Rev-A board, pfuze100 sw4 supplies
csi, audio codec and i2c etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6QDL Sabre-SD board, pfuze100 sw4 supplies
GPS, touch and RGMII etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SL EVK board, the MX6SL_PAD_KEY_ROW5 pin is
used as lcd 3v3 regulator control pin, need to make
sure MX6SL_PAD_KEY_ROW5 is muxed as GPIO function
for controlling lcd 3v3 regulator.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by; Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pwm node should not be under gpio6 node in the device tree.
This fixes detection of the pwm on Droid 4.
Fixes: 6d7bdd328d ("ARM: dts: omap4-droid4: update touchscreen")
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
[tony@atomide.com: added fixes tag]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This display configuration isn't working as-is as it depends on the
tfp410 LCD to HDMI bridge. This will need to be updated later once
the DRM MXSFB driver will be the default.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
