Commit Graph

13768 Commits

Author SHA1 Message Date
Geert Uytterhoeven
c11333cc2e ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:19:50 +01:00
Chris Brandt
69ed50de58 ARM: dts: r7s72100: Add watchdog timer
Add watchdog timer support for RZ/A1.
For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
is useful even if you don't need the watchdog functionality.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:17:48 +01:00
Rafał Miłecki
0b660259e9 ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger
Such a trigger doesn't exist in Linux and is not needed as LED is being
turned off by default. This could cause errors in LEDs core code when
trying to set default trigger.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-09 12:17:18 -08:00
Rafał Miłecki
820a3e952b ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger
Such a trigger doesn't exist in Linux and is not needed as LED is being
turned off by default. This could cause errors in LEDs core code when
trying to set default trigger.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-09 12:16:47 -08:00
Michael Heimpold
768716f4af ARM: dts: imx28-duckbill: update to match vendor distributed DT
This patch updates the Duckbill device tree and synchronize it with
the vendor distributed file. The changes in mostly pin-muxing stuff,
but also some minor fixes. In detail:
- enable SPI pins
- enable I2C pins
- enable UART pins
- enable LRADC pin
- adjust USB DR mode
- add default triggers for LEDs
- get rid of regulators simple-bus container
- adjust phy reset duration
  According to phy datasheet, 25ms are sufficient. This also reduces
  the time to boot the system.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 15:18:43 +01:00
Michael Heimpold
620885e8d4 ARM: dts: imx28: add alternative muxing for mmc2_sck_cfg
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 15:18:26 +01:00
Michael Heimpold
45e89549ac ARM: dts: imx28: rename mmc2_sck_cfg
This patch renames mmc2_sck_cfg in order to prepare for an alternative
muxing setup.

Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 15:18:16 +01:00
Michael Heimpold
df93726be9 ARM: dts: imx28: add alternative pinmuxing for mmc2
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 15:17:57 +01:00
Fabio Estevam
4480de8245 ARM: dts: imx53-qsb: Constrain the TVE DAC voltage
Quoting Philipp Zabel:
"Since this regulator is used as the TVDAC analog power supply, this
range should at least be limited to the analog power supply range of the
TVDAC, listed in Table 74-9. of the i.MX53 reference manual (2.5-2.75V).

But since the nominal voltage is 2.75V, which was used to determine the
analog gain that is supposed to result in the necessary 0.7V
peak-to-peak amplitude on the VGA output, I'd say we should just fix the
voltage to 2750000 here."

, so limit the TVDAC analog power supply as suggested.

Suggested-by: Lucas Stach <l.stach@pengutronix.de>
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 14:59:03 +01:00
Fabio Estevam
2e2c3a5a97 ARM: dts: imx6ul-14x14-evk: Remove unnecessary node
imx6ul.dtsi already contains:

cpu0: cpu@0 {
	....
	arm-supply = <&reg_arm>;
	soc-supply = <&reg_soc>;
};

, so remove the duplication.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 13:55:58 +01:00
Valentin Raevsky
937d9a012a ARM: dts: imx6q-cm-fx6: add analog audio support
The cm-fx6 module has an onboard Wolfson wm8731 codec which is muxed
to the ssi2 controller. Unlike most (all?) supported i.MX6 board/codec
combinations the wm8731 is operated in slave mode and the clock setup
is static.

Add support for it.

Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
[christopher.spinrath@rwth-aachen.de: enhanced commit message, ported
  to upstream and some cleanup]
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 12:48:28 +01:00
Fabio Estevam
12aff99723 ARM: dts: imx6sx-udoo-neo: Fix reboot hang
After issuing a 'reboot' command the imx6sx-udoo-neo board does not
reboot as expected and it just hangs instead.

In mainline kernel only LDO enabled mode is supported. Do not provide
arm-supply/soc-supply nodes in the device tree, so that the board operates
in LDO enabled mode and can then successfully reboot via watchdog.

Fixes: 76e691fc76 ("ARM: dts: imx6sx: Add UDOO Neo support")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 12:44:46 +01:00
Chris Packham
23988bab04 ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:55 +01:00
Chris Packham
b4bcfccb2c ARM: dts: mvebu: Move mv98dx3236 clock bindings
Previously the coreclk binding for the 98dx3236 SoC was inherited from
the armada-370/xp. This block is present in as much as it is possible to
read from the register location without causing any harm. However the
actual sampled at reset values are reflected in the DFX block.

Moving the binding to the DFX block enables support for different clock
strapping options in hardware.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:54 +01:00
Chris Packham
43e28ba877 ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236
The Marvell datasheets refer to the integrated CPU as "Armada-XP". In
reality there are a number of differences to the actual Armada-XP so
rather than including armada-xp.dtsi and disabling many of the IP
blocks. Include armada-370-xp.dtsi and add the required nodes.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:53 +01:00
Chris Packham
35a647f12c ARM: dts: armada-xp-98dx3236: combine dfx server nodes
Rather than having a separate node for the dfx server add a reg property
to the parent node. This give some compatibility with the Marvell
supplied SDK.

As no upstream driver currently exists for this block and support for
this SoC is still quite fresh in the kernel it should not be necessary
to retain a backwards compatible binding.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:52 +01:00
Ansuel Smith
a4ee7e18d8 ARM: dts: armada: Add default trigger for sata led
In others board we have the sata led set to function
with the sata led trigger by default.
This patch makes the same for these board that have sata
led but get disabled by not associating it to any trigger.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:51 +01:00
Gregory CLEMENT
b69f4697c8 ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x
The mbus binding had been extended more than two years ago, but the
device tree files for Armada 38x didn't change.

Adding this third entry will allow the mbus going to suspend which was
the last thing preventing the SoC going to standby mode

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:52:50 +01:00
Ralph Sennhauser
31c212e1b0 ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby)
The Linksys WRT1900ACS (Shelby) is another Armada 385 based router in
the Linksys WRT AC Series which got released in October 2015.

The file armada-385-linksys-shelby.dts is taken from OpenWrt as-is and
originally authored by Imre Kaloz.

URL: 8466384db1/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-shelby.dts
CC: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-08 09:34:42 +01:00
Hoegeun Kwon
4c74ea4e20 ARM: dts: exynos: Add the burst and esc clock frequency properties to DSI node
Add the burst and esc clock frequency properties to the parent (DSI node).
Currently the clock is parsed from the port node, while it should be
taken from the dsi node.

Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-03-08 09:09:05 +02:00
Krzysztof Kozlowski
28928a3ce1 ARM: dts: exynos: Do not ignore real-world fuse values for thermal zone 0 on Exynos5420
In Odroid XU3 Lite board, the temperature levels reported for thermal
zone 0 were weird. In warm room:
	/sys/class/thermal/thermal_zone0/temp:32000
	/sys/class/thermal/thermal_zone1/temp:51000
	/sys/class/thermal/thermal_zone2/temp:55000
	/sys/class/thermal/thermal_zone3/temp:54000
	/sys/class/thermal/thermal_zone4/temp:51000

Sometimes after booting the value was even equal to ambient temperature
which is highly unlikely to be a real temperature of sensor in SoC.

The thermal sensor's calibration (trimming) is based on fused values.
In case of the board above, the fused values are: 35, 52, 43, 58 and 43
(corresponding to each TMU device).  However driver defined a minimum value
for fused data as 40 and for smaller values it was using a hard-coded 55
instead.  This lead to mapping data from sensor to wrong temperatures
for thermal zone 0.

Various vendor 3.10 trees (Hardkernel's based on Samsung LSI, Artik 10)
do not impose any limits on fused values.  Since we do not have any
knowledge about these limits, use 0 as a minimum accepted fused value.
This should essentially allow accepting any reasonable fused value thus
behaving like vendor driver.

The exynos5420-tmu-sensor-conf.dtsi is copied directly from existing
exynos4412 with one change - the samsung,tmu_min_efuse_value.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2017-03-07 22:06:44 +02:00
Jaehoon Chung
2c221f5d41 ARM: dts: exynos: Add phy-pcie node for pcie to Exynos5440
Add pcie-phy node to phy-exynos-pcie along with some changes to other
nodes:
1. Remove the configuration space from "ranges" property because this
   was the old way of getting it. Preferred is to use "config" reg.

2. Use the reg-names as "elbi" and "config" so the purpose of addresses
   will be easily known.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-03-07 21:58:32 +02:00
Willy Tarreau
a58d73340b ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS
This commit adds the device tree description for the Synology DS116 NAS.

It is a one-bay NAS powered by a Marvell Armada 385 at 1.866 GHz. The
device features the following items :
  - 1 GB DDR3 RAM
  - a 8MB SPI flash
  - 2 USB3 ports, power-controlled via a GPIO for each
  - 1 gigabit ethernet interface connected over SGMII to a 88e1514 phy
  - a single SATA port, power-controlled via a GPIO
  - a battery-powered RTC
  - one UART connected to the serial console (2mm connector on board)
  - the Tx line of the second UART connected to a PIC microcontroller
    dealing with beep, reset, power-off and LED blinking (9600 Bps)
  - some of the front-panel LEDs are connected to GPIOs, one is directly
    connected to the SATA link to report disk activity.
  - a GPIO-controlled fan (3 bits for 7 speeds and OFF)

With this DTS, my NAS is 100% functional starting with kernel 4.9.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-07 17:46:43 +01:00
Chris Packham
a126de75c1 ARM: dts: armada-38x add node labels
As was done with Armada XP, add node labels to Armada 38x common and SoC
specific nodes to make them easier to reference in board device trees.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-07 17:20:02 +01:00
Ken Lin
d088391530 ARM: dts: imx6q-bx50v3: change pca953x GPIO default settings
Leave pca953x P06,P07 pins on b850v3 platform and P06 pin on
b450v3/b650v3 unconfigured in the kernel space since they could be
configured as DP1_RST and DP2_RST by the applications for the DP FW
update support.

Signed-off-by: Ken Lin <ken.lin@advantech.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-07 12:38:34 +01:00
Bartosz Golaszewski
f8914131f7 ARM: dts: da850-evm: add the output port to the vpif node
Extend the vpif node with an output port with a single channel.

NOTE: this is still mostly just hardware description - the actual
driver is registered using pdata-quirks. We need the node however
for correct pin control function selection.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 16:46:56 +05:30
Bartosz Golaszewski
2aabeffec6 ARM: dts: da850-evm: add IO expander node on UI card
We need the expander to be probed to allow the VPIF controller to
receive interrupts from the video decoder.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 16:46:47 +05:30
Bartosz Golaszewski
5ff94828b1 ARM: dts: da850: add vpif video display pins
Add a new pinctrl sub-node for vpif display pins. Move VP_CLKIN3 and
VP_CLKIN2 to the display node where they actually belong (vide section
36.2.2 of the OMAP-L138 technical reference manual).

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 16:39:09 +05:30
Bartosz Golaszewski
c42d37c72a ARM: dts: da850-evm: fix whitespace errors
The da850-evm dts file contains whitespace errors in the vpif node.

This patch fixes them.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 16:39:09 +05:30
David Lechner
7723d70beb ARM: da850-lego-ev3: Add device tree node for sound
This adds a device tree node for sound on LEGO MINDSTORMS EV3. The EV3
uses one of the SoC PWMs connected to an amplifier to create sound from
a speaker.

The PWM is passed through a low-pass filter, so it is actually possible
to do PCM playback, but there is no existing driver, so just using
pwm-beeper for now, since it is also a compatible mode of operation.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 15:34:08 +05:30
David Lechner
8a81ff173c ARM: da850-lego-ev3: Add device tree node for A/DC
This adds a node for the TI ADS7957 analog/digital converter on LEGO
MINDSTORMS EV3 as well as a regulator node that is used by the A/DC node.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-07 15:34:08 +05:30
Kuninori Morimoto
c4a59df9de ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
Current	Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.

Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends on data path).

First note is that this "rx" and "tx" are from each IP point,
it doesn't mean Playback/Capture.
Second note is that Audio DMAC assigned on DT is only for
Audio-DMAC, Audio-DMAC-peri-peri has no entry.

=> Audio-DMAC
-> Audio-DMAC-peri-peri
-- HW connection

Playback case

	[Mem] => [SRC]--[DVC] -> [SSI]--[Codec]
	      rx ~~~~~~~~~~~~
Capture

	[Mem] <= [DVC]--[SRC] <- [SSI]--[Codec]
	      tx ~~~~~~~~~~~~

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:48:23 +01:00
Geert Uytterhoeven
65d0b7ed40 ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: 34ea4b4a82 ("ARM: dts: r8a7794: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:45:40 +01:00
Geert Uytterhoeven
beffa8872a ARM: dts: r8a7793: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: ad53f5f00b ("ARM: dts: r8a7793: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:45:27 +01:00
Geert Uytterhoeven
a0504f0880 ARM: dts: r8a7792: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:45:12 +01:00
Geert Uytterhoeven
5d6a2165ab ARM: dts: r8a7791: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 6f9314ce25 ("ARM: dts: r8a7791: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:44:49 +01:00
Geert Uytterhoeven
d492909c84 ARM: dts: r8a7790: Remove unit-addresses and regs from integrated caches
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.

Fixes: 2c3de36700 ("ARM: dts: r8a7790: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:44:39 +01:00
Geert Uytterhoeven
51c00a9f73 ARM: dts: r8a7745: Remove unit-address and reg from integrated cache
The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: c95360247b ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:44:26 +01:00
Geert Uytterhoeven
37f0c804e5 ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 34e8d993a6 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:44:12 +01:00
Geert Uytterhoeven
cdaf6417b7 ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches
The Cortex-A15/A7 cache controllers are integrated controllers, and thus
the device nodes representing them should not have unit-addresses or reg
properties.

Fixes: b0da45c60d ("ARM: dts: r8a73a4: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-07 07:43:47 +01:00
Florian Vaussard
3486935377 ARM: dts: socfpga: Add support for PMU
The dual Cortex-A9 MPCore inside socfpga has a standard PMU unit for
each core mapped in the DAP memory space. Add support for it!

Tested with perf on a Cyclone 5 SoC DK.

Reported-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Tested-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 16:02:58 -06:00
Florian Vaussard
e3e6dba1af ARM: dts: socfpga: Add labels for CPU nodes
This makes it easier to reference the CPU nodes afterwards.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 16:02:17 -06:00
Florian Vaussard
439f559109 ARM: dts: socfpga: Do not include skeleton.dtsi
The skeleton.dtsi file is now deprecated as noted in commit 9c0da3cc61
("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). The SoCFPGA
device trees already contain the nodes that are defined in skeleton.dtsi
(#address-cells, #size-cells, chosen, aliases, memory).

Including skeleton.dtsi is useless and will produce the following
warning when compiled with W=1:

Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Florian Vaussard
cfa6384a01 ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates
GPIO LEDs in the Cyclone5 EBV SOCrates board have a unit name but no reg
property. Indeed, GPIO LEDs do not need such a property. They do not
need a unit name neither. This will trigger the following warnings when
compiled with W=1:

Node /gpio-leds/led@0 has a unit name, but no reg property
Node /gpio-leds/led@1 has a unit name, but no reg property
Node /gpio-leds/led@2 has a unit name, but no reg property

The solution is to remove the unit name. In order to have unique node
names, a rename is necessary. This should be harmless as all the LEDs
have a 'label' property, hence their name do not derive from the node
name and will stay the same after this patch.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Florian Vaussard
fbc06b0e10 ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen
The stmpe_touchscreen node in Cyclone5 MCV EVK has a reg property, but
this is not used by the driver. Moreover the binding documentation do
not define this property. Having a reg property without a unit name will
trigger the following warning when compiled with W=1:

Node /soc/i2c@ffc04000/stmpe811@41/stmpe_touchscreen has a reg or ranges
property, but no unit name

Remove the superfluous reg property.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Florian Vaussard
0c9ff61586 ARM: dts: socfpga: Remove unneeded unit names
Node eccmgr has a unit name, but do not have a reg property as only the
child nodes do have this property. Likewise the usbphy node do not have
a reg property. This will trigger the following warnings when compiled
with W=1:

Node /soc/eccmgr@ffd08140 has a unit name, but no reg property
Node /soc/usbphy@0 has a unit name, but no reg property

Remove the superfluous unit names.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Florian Vaussard
332ddfab42 ARM: dts: socfpga: Add unit name to memory nodes
Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name.
This will trigger several warnings like this one (when compiled with
W=1):

Node /memory has a reg or ranges property, but no unit name

Add the corresponding unit name to each node.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Florian Vaussard
9f24e81659 ARM: dts: socfpga: Add unit name to clock nodes
Most clock nodes in Arria5, Cyclone5 and Arria10 have a reg property but
does not have a unit name. This will trigger several warnings like this
one (when compiled with W=1):

Node /soc/clkmgr@ffd04000/clocks/periph_pll has a reg or ranges
property, but no unit name

Add the corresponding unit name to each node.

Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06 15:54:58 -06:00
Masahiro Yamada
2201c7f10d ARM: dts: uniphier: fix no unit name warnings
Fix warnings reported when built with W=1:
  Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-03-07 05:24:48 +09:00
Masahiro Yamada
8e2b908b9f ARM: dts: uniphier: remove skeleton.dtsi inclusion
Commit 9c0da3cc61 ("ARM: dts: explicitly mark skeleton.dtsi as
deprecated") declared that skeleton.dtsi was deprecated.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-03-07 05:22:56 +09:00