Though cpsw doesn't support EEE feature, Atheros 8035 provides
automatic EEE support that is enabled by default. This causes
occasional link drops when link partner also announces EEE support.
These link drops occur on both 100Mbit/s and 1000Mbit/s speeds.
So disable EEE advertising completely.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The manufacturing information is stored in the EEPROM. This chip
is an AT24C64 not not (nor has it ever been) 24C02. This patch will
correctly address the EEPROM to read the entire contents and not just
256 bytes (of 0xff).
Fixes: 5e3447a29a ("ARM: dts: LogicPD Torpedo: Add AT24 EEPROM Support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Add appropriate properties to devices in the Linksys WRT AC Series for the
mvneta driver to use hardware buffer management.
Also update "soc" ranges property and set the status of bm and bm-bppi
to "okay" (SRAM).
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[adapted rk1108 dtsi to keep bisectability]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Nokia N950 and N9 have a wl1271 (with nokia bootloader) bluetooth
module connected to second UART.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add bcm2048 node and its system clock to the N900 device tree file.
Apart from that a reference to the new clock has been added to
wl1251 (which uses it, too).
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds baud rate, parity & number of data bits. It's required to get
serial working correctly.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
So far every Northstar device we have seen was using the same serial
console params (115200n8). It probably make the most sense to put it in
some proper dtsi files instead of repeating over and over for every
single device. As different boards may use different bootloaders it
seems the safest idea is to use board specific dtsi files.
Just in case some vendor decides to use different UART (parameters) this
can be always easily overwritten.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Droid 4 has two modems, mdm6600 and w3glte. Both are on the HCI USB
controller.
Let's add a configuration for the HCI so the modems can be enabled.
Note that the modems still need additional GPIO based configuration.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-by: Sebastian Reichel <sre@kernel.org>
[tony@atomide.com: left out url]
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can get HDMI working as long as the 5V regulator is on. There is
probably an encoder chip there too, but so far no idea what it might be.
Let's keep the 5V HDMI regulator always enabled for now as otherwise we
cannot detect the monitor properly.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add tmp105 sensor for droid 4. This can be used with modprobe
lm75.ko and running sensors from lm-sensors package. Note that
the lm75.c driver does not yet support alert interrupt but
droid 4 seems to be wired for it.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Droid 4 has a GPIO line that we can use with CONFIG_POWER_RESET_GPIO.
It is probably connected to the CPCAP PMIC, and seems to power down
the whole device taking power consumption to zero based on what
I measured.
Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Tested-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit enable DMA-based transfers for SD/eMMC card adapters
and reduce number of interrupts produced by SD-card/eMMC-card
adapters.
Sometimes interrupts from SD-card/eMMC-card adapters running in
PIO mode blocks execution of hrtimers and I2S DMA callbacks for
a long periods (100 ms or more).
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
[moved dma properties to rk3xxx.dtsi and added sdio dma]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The binding should state "cortina,gemini-gpio", "faraday,ftgpio010"
stating the full name of the IP part.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
According to [0] pointed out by Marc Zyngier in a report about a
similar error message, PPIs 11 and 13 are edge triggered on
Cortex-A9 socs including the rk3066 and rk3188 which currently
mark them as level triggered.
Until some time ago the gic did not care but commit 992345a58e
("irqchip/gic: WARN if setting the interrupt type for a PPI fails")
introduced a warning for that case.
Fix the warning on these socs by describing the interrupts correctly
and also using the binding constants for easier reading in the future.
[0] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/CCHEIGIC.html
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The OPP are declared as shared but no operating points are declared for
cpu1, 2 and 3. Thus, the following error happens during the boot:
cpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.
This patch applies the operating points to each cpu of the A33.
Fixes: 03749eb88e ("ARM: dts: sun8i: add opp-v2 table for A33")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs
Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC
* tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
ARM: dts: silk: Drop superfluous status update for frequency override
ARM: dts: alt: Drop superfluous status update for frequency override
ARM: dts: gose: Drop superfluous status update for frequency override
ARM: dts: porter: Drop superfluous status update for frequency override
ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
ARM: dts: lager: Drop superfluous status update for frequency override
ARM: dts: marzen: Drop superfluous status update for frequency override
ARM: dts: bockw: Drop superfluous status update for frequency override
ARM: dts: porter: Always use status "okay" to enable devices
ARM: dts: r8a7793: Add INTC-SYS clock to device tree
ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Add INTC-SYS clock to device tree
ARM: dts: r8a7792: Add INTC-SYS clock to device tree
ARM: dts: r8a7791: Add INTC-SYS clock to device tree
ARM: dts: r8a7790: Add INTC-SYS clock to device tree
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
ARM: dts: r7s72100: Add watchdog timer
ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Fixes for 4.11:
- Fix USB host for sama5d2
- Fix cpuidle on sama5
* tag 'at91-ab-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: pm: cpu_idle: switch DDR to power-down mode
Revert "ARM: at91/dt: sama5d2: Use new compatible for ohci node"
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner fixes for 4.11
A bunch of device tree fixes for various boards / SoCs.
* tag 'sunxi-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun8i: a23/a33: drop bl_en_pin GPIO pinmux in reference design DTSI
ARM: dts: sun7i: lamobo-r1: Fix CPU port RGMII settings
ARM: sun8i: Fix the mali clock rate
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX fixes for 4.11:
- A fix to reboot hang seen on imx6sx-udoo-neo board, by removing
arm-supply and soc-supply and using LDO enabled mode.
* tag 'imx-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx-udoo-neo: Fix reboot hang
Signed-off-by: Olof Johansson <olof@lixom.net>
The moxart interrupt line flags were not respected in previous
driver: instead of assigning them per-consumer, a fixes mask
was set in the controller.
With the migration to a standard Faraday driver we need to
set up and handle the consumer flags correctly. Also remove
the Moxart-specific flags when switching to using real consumer
flags.
Extend the register window to 0x100 bytes as we may have a few
more registers in there and it doesn't hurt.
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Allow including of dtsi files in an architecture-independent manner.
Some dtsi files may be shared between architectures and one suggestion
was to have symlinks and let these includes get accessed via a
#include <arm64/foo.dtsi>
So add the necessary symlinks for arm32.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
In soft (no-reboot) mode, the driver self-pings watchdog upon expiration
of an interrupt. The interrupt has to be cleared, because otherwise
system enters infinite interrupt handling loop.
Use a samsung,s3c6410-wdt compatible to select appropriate quirk for
clearing the watchdog interrupt.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
The highest supported frequency (1.2GHz) requires to "overvolt" the CPU.
However, some boards still do not have the cpu-supply DT property in the
cpu DT node which means that the CPU will always run with the same input
voltage but try to run at 1.2GHz frequency. This is the source of
(experienced) CPU crashes.
Remove the OPP which requires overvolting the CPU until all boards have
a cpu-supply property.
Fixes: 03749eb88e ("ARM: dts: sun8i: add opp-v2 table for A33")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The digital AIF interfaces has been renamed in the sun8i audio codec
driver so the audio-routing in the device tree must be renamed too.
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add properties to describe the reset topology for on-SoC devices:
- Add the "#reset-cells" property to the CPG/MSSR device node,
- Add resets and reset-names properties to the various device nodes.
This allows to reset SoC devices using the Reset Controller API.
Note that all resets added match the corresponding module clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The bl_en_pin GPIO pinmux is configured as "gpio_in", which makes it
conflicts with the real GPIO usage (out), and makes the backlight not
usable.
Drop the GPIO pinmux for it, thus this GPIO can be correctly used.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CPU port of the BCM53125 is configured with RGMII (no delays) but
this should actually be RGMII with transmit delay (rgmii-txid) because
STMMAC takes care of inserting the transmitter delay. This fixes
occasional packet loss encountered.
Fixes: d7b9eaff5f ("ARM: dts: sun7i: Add BCM53125 switch nodes to the lamobo-r1 board")
Reported-by: Hartmut Knaack <knaack.h@gmx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Adds mailbox / PDC to NSP device tree. Needs new compatibility string
to differentiate from NS2 version.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Adding ethernet aliases. These are used, for example, by bootloaders,
to modify the MAC addresses in the device tree.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is BCM47081A0 based home router with BCM43217 and BCM4352 wireless
chipsets.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
