Atm the LVDS encoder depends on the PPS HW context being saved/restored
from generic suspend/resume code. Since the PPS is specific to the LVDS
and eDP encoders a cleaner way is to reinitialize it during encoder
enabling, so do this here for LVDS. Follow-up patches will init the PPS
for the eDP encoder similarly and remove the suspend/resume time save /
restore.
v2:
- Apply BSpec +1 offset and use DIV_ROUND_UP() when programming the
power cycle delay. (Ville)
v3: (Ville)
- Fix +1 vs. round-up order.
- s/reset_on_powerdown/powerdown_on_reset/
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470827254-21954-3-git-send-email-imre.deak@intel.com
The PPS registers are pretty much the same everywhere, the differences
being:
- Register fields appearing, disappearing from one platform to the
next: panel-reset-on-powerdown, backlight-on, panel-port,
register-unlock
- Different register base addresses
- Different number of PPS instances: 2 on VLV/CHV/BXT, 1 everywhere
else.
We can merge the separate set of PPS definitions by extending the PPS
instance argument to all platforms and using instance 0 on platforms
with a single instance. This means we'll need to calculate the register
addresses dynamically based on the given platform and PPS instance.
v2:
- Simplify if ladder in intel_pps_get_registers(). (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470827254-21954-1-git-send-email-imre.deak@intel.com
Now that host structures are indexed by host engine-id rather than
guc_id, we can usefully convert some for_each_engine() loops to use
for_each_engine_id() and avoid multiple dereferences of engine->id.
Also a few related tweaks to cache structure members locally wherever
they're used more than once or twice, hopefully eliminating memory
references.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
The Context Descriptor passed by the kernel to the GuC contains a field
specifying which engine(s) the context will use. Historically, this was
always set to "all of them", but if we had a separate client for each
engine, we could be more precise, and set only the bit for the engine
that the client was associated with. So this patch enables this usage,
in preparation for having multiple clients, though at this point there
is still only a single client used for all supported engines.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
We have essentially the same code in each of two different
loops, so we can refactor it into a little helper function.
This also reduces the amount of work done during startup,
as we now only reprogram h/w found to be in a state other
than that expected, and so avoid the overhead of setting
doorbell registers to the state they're already in.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
guc_init_doorbell_hw() borrows the (currently single) GuC client to use
in reinitialising ALL the doorbell registers (as the hardware doesn't
reset them when the GuC is reset). As a prerequisite for accommodating
multiple clients, it should only reset doorbells that are supposed to be
disabled, avoiding those that are marked as in use by any client.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
The bottom-half we use for processing the breadcrumb interrupt is a
task, which is an RCU protected struct. When accessing this struct, we
need to be holding the RCU read lock to prevent it disappearing beneath
us. We can use the RCU annotation to mark our irq_seqno_bh pointer as
being under RCU guard and then use the RCU accessors to both provide
correct ordering of access through the pointer.
Most notably, this fixes the access from hard irq context to use the RCU
read lock, which both Daniel and Tvrtko complained about.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1470761272-1245-3-git-send-email-chris@chris-wilson.co.uk
In commit 2529d57050 ("drm/i915: Drop racy markup of missed-irqs from
idle-worker") the racy detection of missed interrupts was removed when
we went idle. This however opened up the issue that the stuck waiters
were not being reported, causing a test case failure. If we move the
stuck waiter detection out of hangcheck and into the breadcrumb
mechanims (i.e. the waiter) itself, we can avoid this issue entirely.
This leaves hangcheck looking for a stuck GPU (inspecting for request
advancement and HEAD motion), and breadcrumbs looking for a stuck
waiter - hopefully make both easier to understand by their segregation.
v2: Reduce the error message as we now run independently of hangcheck,
and the hanging batch used by igt also counts as a stuck waiter causing
extra warnings in dmesg.
v3: Move the breadcrumb's hangcheck kickstart to the first missed wait.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97104
Fixes: 2529d57050 (waiter"drm/i915: Drop racy markup of missed-irqs...")
Testcase: igt/drv_missed_irq
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470761272-1245-2-git-send-email-chris@chris-wilson.co.uk
The doorbell offset is formatted with a 0x prefix to suggest it is
a hexadecimal value, when in fact %d is being used and this is confusing.
Use %X instead to match the proceeding 0x prefix.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
cirrus_modeset_init() is initializing/registering the emulated fbdev
and, since commit c61b93fe51 ("drm/atomic: Fix remaining places where
!funcs->best_encoder is valid"), DRM internals can access/test some of
the fields in mode_config->funcs as part of the fbdev registration
process.
Make sure dev->mode_config.funcs is properly set to avoid dereferencing
a NULL pointer.
Reported-by: Mike Marshall <hubcap@omnibond.com>
Reported-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: c61b93fe51 ("drm/atomic: Fix remaining places where !funcs->best_encoder is valid")
Signed-off-by: Dave Airlie <airlied@redhat.com>
According to E-EDID spec 1.3, table 3.9, a digital video sink with the
"DFP 1.x compliant TMDS" bit set is "signal compatible with VESA DFP 1.x
TMDS CRGB, 1 pixel / clock, up to 8 bits / color MSB aligned".
For such displays, the DFP spec 1.0, section 3.10 "EDID support" says:
"If the DFP monitor only supports EDID 1.X (1.1, 1.2, etc.)
without extensions, the host will make the following assumptions:
1. 24-bit MSB-aligned RGB TFT
2. DE polarity is active high
3. H and V syncs are active high
4. Established CRT timings will be used
5. Dithering will not be enabled on the host"
So if we don't know the bit depth of the display from additional
colorimetry info we should assume 8 bpc / 24 bpp by default.
This patch adds info->bpc = 8 assignement for that case.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This reverts commit 013dd9e038
("drm/i915/dp: fall back to 18 bpp when sink capability is unknown")
This commit introduced a regression into stable kernels,
as it reduces output color depth to 6 bpc for any video
sink connected to a Displayport connector if that sink
doesn't report a specific color depth via EDID, or if
our EDID parser doesn't actually recognize the proper
bpc from EDID.
Affected are active DisplayPort->VGA converters and
active DisplayPort->DVI converters. Both should be
able to handle 8 bpc, but are degraded to 6 bpc with
this patch.
The reverted commit was meant to fix
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331
A followup patch implements a fix for that specific bug,
which is caused by a faulty EDID of the affected DP panel
by adding a new EDID quirk for that panel.
DP 18 bpp fallback handling and other improvements to
DP sink bpc detection will be handled for future
kernels in a separate series of patches.
Please backport to stable.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: stable@vger.kernel.org
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
reports that the "AEO model 0" display is driven with 8 bpc
without dithering by default, which looks bad because that
panel is apparently a 6 bpc DP panel with faulty EDID.
A fix for this was made by commit 013dd9e038
("drm/i915/dp: fall back to 18 bpp when sink capability is unknown").
That commit triggers new regressions in precision for DP->DVI and
DP->VGA displays. A patch is out to revert that commit, but it will
revert video output for the AEO model 0 panel to 8 bpc without
dithering.
The EDID 1.3 of that panel, as decoded from the xrandr output
attached to that bugzilla bug report, is somewhat faulty, and beyond
other problems also sets the "DFP 1.x compliant TMDS" bit, which
according to DFP spec means to drive the panel with 8 bpc and
no dithering in absence of other colorimetry information.
Try to make the original bug reporter happy despite the
faulty EDID by adding a quirk to mark that panel as 6 bpc,
so 6 bpc output with dithering creates a nice picture.
Tested by injecting the edid from the fdo bug into a DP connector
via drm_kms_helper.edid_firmware and verifying the 6 bpc + dithering
is selected.
This patch should be backported to stable.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: stable@vger.kernel.org
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Change tilcdc_crtc_page_flip() to tilcdc_crtc_update_fb(). The
function is not used as a page_flip() callback anymore so it is only
confusing to call it that. The function should only be used by dummy
primary plane commit() callback.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Remove unnecessary pm_runtime_get() and *_put() calls from commit
phase callbacks. Those calls are not needed since we have the whole
commit phase between pm_runtime_get_sync() and pm_runtime_put_sync().
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Get rid of legacy dpms mechanism. This simplifies the code quite a
bit. The old start() and stop() functions become tilcdc_crtc_enable()
and *_disable(). The functions are added with all the necessary
mechanisms from the old dpms function and they are used directly as
the crtc helper enable() and disable() callbacks.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Use drm_atomic_helper_resume/suspend() and get rid off all the obsolete
register level context restoring code.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Enable and disable interrupts in crtc start() and stop(). None of the
interrupts can fire if CRTC is disabled, so it is cleaner - when
considering suspend/resume code etc. - to enable the interrupts when
CRTC is turned on and to disable them when CRTC is turned off.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add atomic modeset helpers to tfp410 connector funcs. Property handling
related helpers, atomic reset helper, and new dpms helper is needed in
connector for atomic modeseting to work. The default helper functions
are enough.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Set crtc panel info at init phase. Setting it at prepare callback does
it multiple times for no good reason and it is also too late when atomic
modeset is used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add atomic modeset helpers to panel connector funcs. Property handling
related helpers, atomic reset helper, and new dpms helper is needed in
connector for atomic modeseting to work. The default helper functions
are enough.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Set crtc panel info at init phase. Setting it at prepare callback does
it multiple times for no good reason and it is also too late when atomic
modeset is used.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Remove tilcdc_verify_fb(). The tilcdc_verify_fb() function is not
needed because the same checks are implemented in
tilcdc_plane_atomic_check().
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Remove obsolete crtc helper functions. These are not needed when
atomic modeset is used.
Note that the drm_crtc_helper_funcs mode_fixup() is still needed. The
crtc's check() callback can not do its job here.
The plane's check() callback needs to set drm_crtc_state's
->mode_changed to true if the pixel format for the framebuffer
changes. Because of this drm_mode_config_funcs atomic_check() callback
needs to call drm_atomic_helper_check_modeset() once more after it has
called drm_atomic_helper_check_planes(). If the fixing of the
adjusted_mode would be done in drm_crtc_helper_funcs atomic_check()
callback, it would get over written by the extra
drm_atomic_helper_check_modeset() call.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Set DRIVER_ATOMIC and use atomic helpers and rename commit and prepare
crtc helpers to enable and disable. This makes the final jump to mode
setting, but there is lot of obsolete code to clean up.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add drm_mode_config_reset() call to tilcdc_load(). This is need to
initialize atomic state variables at load time.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add atomic mode config funcs. The atomic_commit implementation is a
copy-paste from drm_atomic_helper_commit(), leaving out the async
test. The similar copy-paste implementation appears to be used in many
other drivers too. The standard drm_atomic_helper_check() is used for
checking.
The drm_atomic_helper_check() can not be used in drm_mode_config_funcs
atomic_check() callback because the plane's check implementation may
update crtc state's ->mode_changed flag. Because of this the
drm_atomic_helper_check_modeset() has to be called once more after
drm_atomic_helper_check_planes() (see drm_atomic_helper_check_modeset()
documentation).
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add tilcdc_crtc_atomic_check(). Checks the display mode validity and
the presence of the mandatory primary plane.
The drm_crtc_helper_funcs mode_fixup() callback is left untouched and
the check function does no try to do its job on purpose, despite what
the mode_fixup() callback's documentations suggests.
The plane's check() callback needs to set drm_crtc_state's
->mode_changed to true if the pixel format for the framebuffer
changes. Because of this drm_mode_config_funcs atomic_check() callback
needs to call drm_atomic_helper_check_modeset() once more after it has
called drm_atomic_helper_check_planes(). If the fixing of the
adjusted_mode would be done in drm_crtc_helper_funcs atomic_check()
callback, it would get over written by the extra
drm_atomic_helper_check_modeset() call.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add tilcdc_crtc_mode_set_nofb(). The mode_set_nofb() semantics do not
fit well to LCDC, because of the mandatory framebuffer. However, when
the primary plane is required in the check phase, it and the
framebuffer can be found from the atomic state struct.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add dummy primary plane implementation. LCDC does not really have
planes, only simple framebuffer that is mandatory. This primary plane
implementation has the necessary checks for implementing simple
framebuffer trough DRM plane abstraction. For setting the actual
framebuffer the implementation relies on a CRTC side function.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Make tilcdc_crtc_page_flip() work if crtc is not yet on. The plane
commit sometimes comes before crtc is turned on. The new framebuffer
should be set to scanout also in that case, so that it is there when
crtc is turned on at the end of the commit phase.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Fix tilcdc component master unloading. If a subcomponent module
(tda998x in this case) is unloaded before its master (tilcdc in this
case), it calls drm_put_dev() and it should not be called again by
the master when its module is unloaded. However component_master_del()
must still be called and the check if the drm_put_dev() has been
called must be in component_master_ops unbind() callback, not in
platform_driver remove() callback.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Add drm_crtc_vblank_on() and *_off() calls to start() and stop()
functions, to make sure any vblank waits etc. gets properly cleaned
up.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Increase time out for waiting frame done interrupt. 50ms is long
enough for the usual display modes (50 Hz or higher refresh rate), but
it may be a bit tight for some unusual mode.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Move wait queue waiting of LCDC_FRAME_DONE IRQ from tilcdc_crtc_dpms()
into stop() function. This is just a cleanup and enables independent
use of stop() function.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reorder the IRQ function so that the write to LCDC_END_OF_INT_IND_REG
is done last. The write to LCDC_END_OF_INT_IND_REG indicates to LCDC
that the interrupt service routine has completed (see section
13.3.6.1.6 in AM335x TRM). This is needed if LCDC's ipgvmodirq module
is configured for pulse interrupts.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Move LCDC_SYNC_LOST handling inside if (ver == 2) statement.
LCDC_SYNC_LOST interrupt status bit is only defined for version 2
silicon.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
