The Amlogic reference driver uses the "mc_val" devicetree property to
configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic
values for this configuration.
According to the datasheet the PRG_ETHERNET_ADDR0 register is at address
0xc8834108. However, the reference driver uses 0xc8834540 instead.
According to my tests, the value from the reference driver is correct.
No changes are required to the board dts files because the only
required configuration option is the phy-mode, which had to be
configured correctly before as well.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Pull uaccess fixes from Al Viro:
"Fixes for broken uaccess primitives - mostly lack of proper zeroing
in copy_from_user()/get_user()/__get_user(), but for several
architectures there's more (broken clear_user() on frv and
strncpy_from_user() on hexagon)"
* 'uaccess-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (28 commits)
avr32: fix copy_from_user()
microblaze: fix __get_user()
microblaze: fix copy_from_user()
m32r: fix __get_user()
blackfin: fix copy_from_user()
sparc32: fix copy_from_user()
sh: fix copy_from_user()
sh64: failing __get_user() should zero
score: fix copy_from_user() and friends
score: fix __get_user/get_user
s390: get_user() should zero on failure
ppc32: fix copy_from_user()
parisc: fix copy_from_user()
openrisc: fix copy_from_user()
nios2: fix __get_user()
nios2: copy_from_user() should zero the tail of destination
mn10300: copy_from_user() should zero on access_ok() failure...
mn10300: failing __get_user() and get_user() should zero
mips: copy_from_user() must zero the destination on access_ok() failure
ARC: uaccess: get_user to zero out dest in cause of fault
...
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
Pull "arm64: Xilinx ZynqMP dt patches for v4.9" from Michal Simek:
- Fix gic ranges property
- Use 64bit size cells format
- Add PCIe node
- Correct pmu and watchdog nodes
* tag 'zynqmp-dt-for-4.9' of https://github.com/Xilinx/linux-xlnx:
ARM64: zynqmp: Correct the watchdog timer interrupt number
ARM64: zynqmp: Add missing interrupt-parent to PMU node
ARM64: zynqmp: Add PCIe node
ARM64: zynqmp: Use 64bit size cell format
ARM64: zynqmp: Align gic ranges for 64k in device tree
Pull xen regression fix from David Vrabel:
"Fix SMP boot in arm guests"
* tag 'for-linus-4.8b-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
arm/xen: fix SMP guests boot
Pull "ARM: mediatek: dts64 updates for v4.9" from Matthias Brugger:
- add HDMI related nodes to mt8173
- enable the HDMI output on mt8173-evb
* tag 'v4.8-next-dts64' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mt8173-evb: enable HDMI output
arm64: dts: mt8173: Add HDMI related nodes
Pull "i.MX arm64 device tree changes for 4.9" from Shawn Guo:
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
* tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards
arm64: dts: updates serial aliases for ls1043a rdb and qds boards
arm64: dts: Add DDR memory controller for Layerscape SoCs
Pull "arm64: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
* tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Select PM_GENERIC_DOMAINS
arm64: tegra: Enable XUSB controller on Tegra210 Smaug
arm64: tegra: Add the various audio devices for Tegra210 Smaug
arm64: tegra: Enable DPAUX for Tegra210 Smaug
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
arm64: tegra: Add SOR power-domain for Tegra210
arm64: tegra: Add ADMA node for Tegra210
arm64: tegra: Add AGIC node for Tegra210
arm64: tegra: Drop clock and reset names for XUSB powergates
arm64: tegra: Simplify Tegra210 GPIO compatible value
Pull "Rockchip dts64 changes for 4.9" from Heiko Stübner:
64bit Rockchip devicetree changes containing support for the recently
added firmware reboot-flag support, one new board the Tronsmart Orion
based on the rk3368 and a large number of newly supported peripherals
for the rk3399 (type-c phy, usb2 phy, pcie controller and pcie phy,
gmac, arm-pmu using ppi partitioning, efuse, saradc) as well as some
smaller housekeeping and non-critical fixes.
* tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: add Type-C phy for RK3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: support the pmu node for rk3399
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: add efuse0 device node for rk3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
arm64: dts: rockchip: add the PCIe controller support for RK3399
arm64: dts: rockchip: add the PCIe PHY for RK3399
arm64: dts: rockchip: add the gmac power domain on rk3399
arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
arm64: dts: rockchip: fix the address map for WDT0 and WDT1
arm64: dts: rockchip: add the saradc for rk3399
arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
arm64: dts: rockchip: add usb2-phy support for rk3399
arm64: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
arm64: dts: rockchip: remove broken-cd from sdio0
...
Pull "Broadcom devicetree-arm64 changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
* tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: Add PWM DT node for NS2
Pull "mvebu dt64 for 4.9 (part 1)" from Gregory CLEMENT:
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
* tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
arm64: dts: marvell: add description for the Armada 8040 dev board
arm64: dts: marvell: add description for the slave CP110 in Armada 8K
Pull "Qualcomm ARM64 Updates for v4.9" from Andy Gross:
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
* tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Add HDMI display support
arm64: dts: msm8916: Add display support
arm64: dts: db820c: add support to external sd card.
arm64: dts: db820c: add support to SPI on HS
arm64: dts: db820c: add support to LS-SPI0
arm64: dts: db820c: add support to I2C on HS
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add basic board support
arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
arm64: dts: qcom: Fix broken interrupt trigger settings
arm64: dts: qcom: msm8916: Add tcsr syscon
arm64: dts: qcom: msm8916: Make scm a reset-controller
arm64: dts: qcom: msm8916: Add mba memory reserve
arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.9" from Wei Xu:
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
* tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1
arm64: dts: hi6220: add resets property into dwmmc nodes
arm64: dts: hikey: extend default cma size to 128MB
arm64: dts: hip06: Append sas node
arm64: dts: hip06: Append hns node
dt-bindings: hisilicon: Add Hip05 and Hip06 system controller support
arm64: dts: hip05: kill hip05_hns.dtsi
arm64: dts: hikey: Add pstore support for HiKey
arm64: dts: hikey: Add hikey support for syscon-reboot-mode
arm64: dts: Add HDMI node for hi6220-hikey
arm64: dts: Add display subsystem DT nodes for hi6220-hikey
arm64: dts: set UART1 clock frequency to 150MHz
The default PHY configuration disables most of the LEDs. The following
configures the ethernet activity LEDs as Netgear intended.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Pull "Samsung DeviceTree ARM64 update for v4.9" from Krzysztof Kozlowski:
1. Use human-friendly symbols for interrupt flags.
* tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for timer interrupt flags
Merge "UniPhier ARM64 SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
* tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add LD11 SoC/Board support
arm64: dts: uniphier: add specific compatible to SoC-Glue node
arm64: dts: uniphier: use clock/reset controllers
arm64: dts: uniphier: add pinctrl property to System Bus node
arm64: dts: uniphier: match DT names to other projects and documents
This is a router based on the mv88f5181 chipset.
http://www.netgear.com/support/product/WNR854T.aspxhttp://wiki.openwrt.org/toh/netgear/wnr854t
[gregory.clement@free-electrons.com:
- extract dt part from "arm: orion5x: Add DT-based support for Netgear
WNR854T"
- squashed "arm: orion5x: Alias uart0 to serial0 for all orion5x" into
this commit and move serial0 alias from dtsi to dts]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
rd88f6183ap-ge passes NO_IRQ as the interrupt line for its m25p80
NOR flash. However, this device never uses an interrupt and the
driver doesn't care, so we can simply remove the deprecated constant
here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
One of the last users of NO_IRQ on ARM is the switch initialization
code on orion5x, which sometimes passes a GPIO based IRQ number.
However, the driver doesn't actually use this number, and according
to Andrew Lunn never will do it for non-DT based machines, so
we can simply drop the irq argument.
Simplifying it further, we can also drop the static platform_device
and instead call platform_device_register_data(), which in turn
lets us mark the platform_data structures as __initdata and slightly
reduce the memory consumption.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For most devices, we know in advance whether they have an
interrupt line or not, so we can avoid passing NO_IRQ and
instead split fill_resources() into two interfaces, with
only the new fill_resources_irq() function taking an irq
argument, which it then can use unconditionally.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Out of the four ethernet devices on mv78xx0, only the first one
has an error interrupt line, for the other ones we pass NO_IRQ
and then ignore the argument.
In order to get closer to complete remove of NO_IRQ, this simply
drops the unused function arguments.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Common definitions for the SoC for board definitions to use.
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
orion-wdt refuses to start without these properties defined, so lift
definitions out of kirkwood/dove.dtsi
[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit adds a reference to the appropriate MSI controller in the
description of the PCIe controllers on Marvel Armada 7K and 8K
platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Commit 88e957d6e4 ("xen: introduce xen_vcpu_id mapping") broke SMP
ARM guests on Xen. When FIFO-based event channels are in use (this is
the default), evtchn_fifo_alloc_control_block() is called on
CPU_UP_PREPARE event and this happens before we set up xen_vcpu_id
mapping in xen_starting_cpu. Temporary fix the issue by setting direct
Linux CPU id <-> Xen vCPU id mapping for all possible CPUs at boot. We
don't currently support kexec/kdump on Xen/ARM so these ids always
match.
In future, we have several ways to solve the issue, e.g.:
- Eliminate all hypercalls from CPU_UP_PREPARE, do them from the
starting CPU. This can probably be done for both x86 and ARM and, if
done, will allow us to get Xen's idea of vCPU id from CPUID/MPIDR on
the starting CPU directly, no messing with ACPI/device tree
required.
- Save vCPU id information from ACPI/device tree on ARM and use it to
initialize xen_vcpu_id mapping. This is the same trick we currently
do on x86.
Reported-by: Julien Grall <julien.grall@arm.com>
Tested-by: Wei Chen <Wei.Chen@arm.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
This patch enables the uniperif players 2 & 3 for b2120 boards
and also adds the "simple-audio-card" device node to interconnect
the SoC sound device and the codec.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT node for the uniperif reader
IP block found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This patch adds the DT nodes for the uniperif player
IP blocks found on STiH407 family silicon.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
The PE for root bus (root PE) can be removed because of PCI hot
remove in EEH recovery path for fenced PHB error. We need update
@phb->root_pe_populated accordingly so that the root PE can be
populated again in forthcoming PCI hot add path. Also, the PE
shouldn't be destroyed as it's global and reserved resource.
Fixes: c5f7700bbd ("powerpc/powernv: Dynamically release PE")
Reported-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Some omap5 variants have more than 2GB of memory available as
optional models. Let's update the dts files to use two address
cells similar to what dra7 is using with commit dae320ec31
("ARM: dts: DRA7: change address-cells and size-cells").
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Latest update to the BeagleBoard-X15 platform (revision B1)[1] updates
for allowing UHS SD cards to function with the split of supply to SD
card from a dedicated LDO.
As a result of this, AM57xx BeagleBoard-X15 now uses gpio2_30 instead
of gpio6_28 for HDMI because HDMI_LS_OE should now be switched from
GPIO6_28(Y9) to GPIO2_30 (AG8) to avoid a 1.8V GPIO toggling a 3.3V
SoC input when the SD card is in UHS 1.8V mode.
NOTE: For UHS mode to function, we need full fledged IODelay support
in kernel to be functional. IODelay support is yet to be added.
Further, It does not make much sense to spin off a new board
compatible flag since there is no real functional benefit for the
same.
Note: Even though production version is supposed to be B1, there is
over ~200 boards of previous version (A2)[2] out there which continue
to get supported with the existing dts file (to maintain compatibility
with existing bootloaders for A2) and the production board is now
supported as revb1.
[1] https://github.com/beagleboard/beagleboard-x15/blob/master/BEAGLEBOARD_X15_REV_B1.pdf
[2] http://marc.info/?l=linux-arm-kernel&m=147273929820708&w=2
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
isolation as part of initial bootloader executed from SRAM. This is
done as part of iodelay configuration sequence and is required due
to the limitations introduced by erratum ID: i869[1] (IO Glitches
can occur when changing IO settings) and elaborated in the Technical
Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
Only peripheral that is permitted for dynamic pin mux configuration
is MMC and DCAN. MMC is permitted to change to accommodate the
requirements for varied speeds (which require IO-delay support in
kernel as well). DCAN is a result of i893[1] (DCAN initialization
sequence). However, since we don't use DCAN on X15, with the exception
of MMC, all other pin mux configurations are removed from the dts.
[1] http://www.ti.com/lit/pdf/sprz429
[2] http://www.ti.com/lit/pdf/sprui30
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LEDs on igepv5 are on the GPIO expander unlike on omap5-uevm.
Configuration copied from git.isee.biz git tree except fixed for
red and blue mapping.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
for the driver to use, and also make sure the PMIC GPIO pin muxing
is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
the ID pin GPIO work.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Few changes to fix issues I've noticed while debugging omap5-uevm
wl18xx issues:
1. Move wlcore irq pin muxing under wlcore. This irq could be
different from gpio_wk14 on some board variants
2. Don't configure pull on wlcore irq pin. There is a 10k
pull up resistor R105 on the device to VDDS_1v8_MAIN
3. The padconf register for wlsdio_data1 is wrong, it's really
at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
for wlsdio_data0
4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
that's what the TDK R078 part seems to be
5. The MMC interrupt for WLAN musb be wakeupgen, not gic
Looks like omap5-uevm WLAN behaves better now, but I still seem
to have issues with some access points.
Signed-off-by: Tony Lindgren <tony@atomide.com>
really ugly, but apparently avr32 compilers turns access_ok() into
something so bad that they want it in assembler. Left that way,
zeroing added in inline wrapper.
Cc: stable@vger.kernel.org
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
