The chip is smsc9115, connected via SROMc bank 3. Additionally, some GPIO
initialization is required.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Device Tree changes for v4.6 adding the nodes for Exynos SROM controller
driver. The driver saves and restores SROM registers during suspend to RAM.
DT changes should go in before removal of SROM support from mach-exynos.
Add the required pin configuration support to Exynos5410 using pinctrl
interface.
Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com>
[AF: Rebased, style changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Pavel Fedin <p.fedin@samsung.com>
[k.kozlowski: Move pinctrl nodes into soc node]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Define the SILK board dependent part of the DU device node.
Add the device nodes for the Analog Devices ADV7511W HDMI transmitter
(connected to DU0) and ADV7123 video DAC (connected to DU1). Add the
necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA
connectors.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move dmac nodes in the r8a7793 device tree to match their location
in the r8a7791 device tree to aid comparison between the device
trees of these similar SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the QSPI controller in the alt device tree.
Based similar work for the silk board by by Vladimir Barinov and
Sergei Shtylyov.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Define the Porter board dependent part of the DU device node.
Add the device node for Analog Devices ADV7511W HDMI transmitter to I2C2
bus and the HDMI connector. Add the necessary subnodes to interconnect DU
and HDMI devices.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the GPIO leds in the gose device tree.
Based on similar work for the koelsch board by Magnus Damm.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Magnus Damm <damm+renesas@opensource.se>
Instantiate the GPIO keys in the gose device tree.
Based on similar work for the koelsch board by Laurent Pinchart.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Magnus Damm <damm+renesas@opensource.se>
mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.
Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.
Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2_8bit_pins is used with eMMC chips, which also have a reset pin.
The MMC controller also has a reset output that is supported.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2_8bit_pins is used with eMMC chips, which also have a reset pin.
The MMC controller also has a reset output that is supported.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
According to Allwinner, only mmc3 supports 8 bit DDR transfers for eMMC.
Switch to mmc3 for the onboard eMMC, and also assign vqmmc for signal
voltage sensing, and "cap-mmc-hw-reset" to denote this instance can use
eMMC hardware reset.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2 and mmc3 are available on the same pins, with different mux values.
However, only mmc3 supports 8 bit DDR transfer modes.
Since preference for mmc3 over mmc2 is due to DDR transfer modes, just
set the drive strength to 40mA, which is needed for DDR.
This pinmux setting also includes the hardware reset pin for emmc.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sun9i/A80 MMC controllers have a larger FIFO, and the FIFO DMA
trigger levels can be increased. Also, the mmc module clock parent
has a higher clock rate, and the sample and output delay phases
are different.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.
Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current DT doesn't have a phandle to the CPU regulator in the CPU node,
which disables the CPU voltage scaling entirely.
Add that phandle.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cubietruck Plus is a A83T/H8 based development board. The board has
standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host
via HSIC USB Hub, USB OTG, SATA via USB bridge, gigabit ethernet,
WiFi, headphone out / mic in, and various GPIO headers.
The board also has an EEPROM on i2c0 which holds the MAC address.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A83T, like previous Allwinner SoCs, has a watchdog as part of its
timer block. Add a device node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.
It has UART, ethernet, USB, HDMI, etc ports on it.
For FEL mode it needs USB A-A(Male) cable. I used uart0 which
is multiplexed to microsd pins PF2 and PF4.
Enabled UART0 Header(PB9, PB10 pins).
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
[Maxime: Removed empty chosen node]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node describing the focaltech ft5306de4 touchscreen found on
chuwi-v7-cw0825 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node describing the focaltech ft5406ee8 touchscreen found on
inet-9f-rev03 / qware qw tb-g100 tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the IO domain configuration for the Rock2 SOM and model the fixed
regulator used as the vqmmc for the EMMC device.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The current vdd_arm voltage is too low, increase it will make
the system more stable.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rayeager/Bqcurie2/Marsboard use pwm3 modulate the vdd_logic voltage,
so enable it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Although We can add the sdmmc node, shouldn't enable it.
Since the sdmmc is reusing the same pin with uart2.
Unfortunately, the uart2 is used by the debug port, so that will cause
the debug information can't display on console if enabling the sdmmc.
As we have supported the sdmmc (sd card) on hardware for kylin board.
So, maybe we can have the sdmmc node in kylin dts, not to enable it.
Anyway, you only need add the okay status if someone want to enable the
sdmmc.
e.g.
if you use the adb to debug with android os.
You can add the
status = "okay" to enable the sdmmc for sd card working.
The default status is disabling it.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the sdio power sequence for kylin board.
The WLAN attached to a SDIO interface, wifi/bluetooth have
reset and power been needed to enable.
AFAIK, the simple power sequence provider sets a value for multiple GPIOs.
So the reset and power of WlAN chip can be handled in mmc power sequence.
On the module itself this is one of these, that should can be handled
by reset GPIOs in simple mmc power sequence.
The Bluetooth host wake is high active from bootup, this patch is also
set pinctrl bias as the default to enable the pull up in soc internal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We want to the higher speed for wifi module working.
Bootup kernel log:
...
mmc_host mmc0: Bus speed (slot 0) = 37125000Hz (slot req 37500000Hz,
actual 37125000HZ div = 0)
or run 'cat /sys/kernel/debug/clk/clk_summary |grep phase -C 1' to check
Otherwise, the mmc0 will run 400khz defalult value to work.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Describe the two user-controllable LEDs on Rock2 Square boards.
All information have been retrieved from the schematics and the vendor
devicetree. The default-triggers mimic the behaviour of the vendor-kernel to
keep functionalities in sync.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3036-kylin board uses a rt5616 audio codec connected to the i2s
and can use the simple card to tie everyting together.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
For sound setups using the simple-card mechanism, the main clock
(sysclk) is expected to be the first element. For the i2s-driver
itself it doesn't matter, as it uses named clocks, so we can just
swap them.
Reported-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Sometime will hang if you set the i2s pinctrl as the none setting.
Let's set the pinctrl as the default setting to enable the gpio bias.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Pull ARM SoC fixes from Olof Johansson:
"A few fixes for fallout that we didn't catch in time in -next, or
smaller warning fixes that have been discovered since"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
soc: qcom/spm: shut up uninitialized variable warning
ARM: realview: fix device tree build
ARM: debug-ll: fix BCM63xx entry for multiplatform
ARM: dts: armadillo800eva Correct extal1 frequency to 24 MHz
