Commit Graph

12882 Commits

Author SHA1 Message Date
Geert Uytterhoeven
c3373b09ba ARM: dts: silk: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:28 +01:00
Geert Uytterhoeven
19417bd9c5 ARM: dts: porter: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:28 +01:00
Geert Uytterhoeven
e50b5ac88d ARM: dts: marzen: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:27 +01:00
Geert Uytterhoeven
1781460c9a ARM: dts: lager: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:26 +01:00
Geert Uytterhoeven
338f7ebf46 ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates:
  - SCIF:
      - Supports now 50, 75, 110, 1152000, 1500000, 2000000, and
        4000000 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000 bps.
  - HSCIF:
      - Supports now 50, 75, 110, 134, 150, and 200 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000, 1152000, 3000000, 3500000, and 4000000
	bps.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:26 +01:00
Geert Uytterhoeven
81a81ba941 ARM: dts: gose: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:25 +01:00
Geert Uytterhoeven
33ef9688ae ARM: dts: bockw: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:25 +01:00
Geert Uytterhoeven
8a758a9493 ARM: dts: alt: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:24 +01:00
Geert Uytterhoeven
a864446f96 ARM: dts: r8a7794: Add BRG support for (H)SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:23 +01:00
Geert Uytterhoeven
166d8ca693 ARM: dts: r8a7793: Add BRG support for SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:23 +01:00
Geert Uytterhoeven
394730a133 ARM: dts: r8a7791: Add BRG support for (H)SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:22 +01:00
Geert Uytterhoeven
42af65e88d ARM: dts: r8a7790: Add BRG support for (H)SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.

This increases the range and accuracy of supported baud rates on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:21 +01:00
Geert Uytterhoeven
f2be5f00d5 ARM: dts: r8a7779: Add BRG support for SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.

This increases the range and accuracy of supported baud rates on SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:21 +01:00
Geert Uytterhoeven
5fb544da5f ARM: dts: r8a7778: Add BRG support for SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.

Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF device nodes.

This increases the range and accuracy of supported baud rates on SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:20 +01:00
Laurent Pinchart
1b463bd510 ARM: dts: r8a7794: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:19 +01:00
Laurent Pinchart
48f27c190c ARM: dts: r8a7793: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:19 +01:00
Laurent Pinchart
bb7ca1952e ARM: dts: r8a7791: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:18 +01:00
Laurent Pinchart
6c6e12a1f9 ARM: dts: r8a7790: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:17 +01:00
Laurent Pinchart
b406f38d4b ARM: dts: r8a7779: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:17 +01:00
Laurent Pinchart
258b3c3189 ARM: dts: r8a7778: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:16 +01:00
Laurent Pinchart
0995b9a8d6 ARM: dts: r8a7740: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:16 +01:00
Laurent Pinchart
d4be2f1bfd ARM: dts: r8a73a4: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:15 +01:00
Laurent Pinchart
92489120be ARM: dts: r7s72100: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:14 +01:00
Laurent Pinchart
46ae0e376b ARM: dts: sh73a0: Rename the serial port clock to fck
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:14 +01:00
Geert Uytterhoeven
06930a1f9d ARM: dts: r8a7794: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:13 +01:00
Geert Uytterhoeven
3ffc90a3e9 ARM: dts: r8a7793: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:12 +01:00
Geert Uytterhoeven
b5b52dd7d0 ARM: dts: r8a7791: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:12 +01:00
Geert Uytterhoeven
a20dc9f2e4 ARM: dts: r8a7790: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:11 +01:00
Geert Uytterhoeven
b2ac44fa39 ARM: dts: r8a7779: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:11 +01:00
Geert Uytterhoeven
720e9096e3 ARM: dts: r8a7778: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:10 +01:00
Simon Horman
b14ce2321b ARM: dts: emev2: use GIC_* defines
Use GIC_* defines for GIC interrupt cells in emev2 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:09 +01:00
Simon Horman
10bbad96d4 ARM: dts: sh73a0: use GIC_* defines
Use GIC_* defines for GIC interrupt cells in sh73a0 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-09 19:43:09 +01:00
Simon Horman
16af4e9705 ARM: dts: r7s72100: use GIC_* defines
Use GIC_* defines for GIC interrupt cells in r7s72100 device tree.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-09 19:43:08 +01:00
Marcus Cooper
d3e84a9318 ARM: dts: sun7i: Enable USB DRC on Olimex A20 EVB
Enable the otg/drc usb controller on the Olimex A20 EVB.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-02-09 19:34:59 +01:00
Marcus Cooper
bd10bce878 ARM: dts: sun7i: Enable USB DRC on MK808C
Enable the otg/drc usb controller on the MK808C.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-02-09 19:32:00 +01:00
Nathan Rossi
b977025153 ARM: dts: zynq: Enable USB and USB PHY for ZYBO
Setup the USB controller and configure it to operate in host mode.
Additionally add the USB phy node for the ZYBO, including reset gpio
which is connected to a external MIO pin.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-02-09 13:18:08 +01:00
Roger Shimizu
b1742ffa9d ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl
Add dts file to support Buffalo Linkstation LS-GL
(a.k.a Buffalo Linkstation Pro/Live), which is marvell orion5x based
3.5" HDD NAS.

Product info:
  - (JPN) http://buffalo.jp/products/catalog/item/l/ls-gl/
  - (ENG) http://www.buffalotech.com/products/network-storage/linkstation/linkstation-pro

This device tree is based on the board file:
  arch/arm/mach-orion5x/kurobox_pro-setup.c
However, that board file also support Kurobox Pro, which is not supported by
device tree yet. So the board file is not removed.

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:21:25 +01:00
Roger Shimizu
305e0b2a7a ARM: dts: orion5x: split linkstation lswtgl into common and device parts
In order to support more linkstation devices, common part of current
.dts file goes into .dtsi file. Some .dtsi start with "mvebu-" prefix
because other kirkwood based linkstation devices are similar, and
will be migrated to use these .dtsi some time later.
  - orion5x-linkstation.dtsi
  - mvebu-linkstation-fan.dtsi
  - mvebu-linkstation-gpio-simple.dtsi
while all rest part remains in device specific .dts file:
  - orion5x-linkstation-lswtgl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:21:25 +01:00
Thomas Petazzoni
34d482904c ARM: dts: armada-38x: add reference to ETH connectors for A385-AP
This commit adds some comments to the Armada 385 AP Device Tree
description to indicate which Ethernet interface matches which
physical connector on the board.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:18:32 +01:00
Thomas Petazzoni
cb4f71c429 ARM: dts: armada-38x: change order of ethernet DT nodes on Armada 38x
On Armada 38x, the available network interfaces are:

 - port 0, at 0x70000
 - port 1, at 0x30000
 - port 2, at 0x34000

Due to the rule saying that DT nodes should be ordered by register
addresses, the network interfaces are probed in this order:

 - port 1, at 0x30000, which gets named eth0
 - port 2, at 0x34000, which gets named eth1
 - port 0, at 0x70000, which gets named eth2

(if all three ports are enabled at the board level)

Unfortunately, the network subsystem doesn't provide any way to rename
network interfaces from the kernel (it can only be done from
userspace). So, the default naming of the network interfaces is very
confusing as it doesn't match the datasheet, nor the naming of the
interfaces in the bootloader, nor the naming of the interfaces on
labels printed on the board.

For example, on the Armada 388 GP, the board has two ports, labelled
GE0 and GE1. One has to know that GE0 is eth1 and GE1 is eth0, which
isn't really obvious.

In order to solve this, this patch proposes to exceptionaly violate
the rule of "order DT nodes by register address", and put the 0x70000
node before the 0x30000 node, so that network interfaces get named in
a more natural way.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:18:32 +01:00
Gregory CLEMENT
38b162032f Merge branch 'mvebu/fixes' into mvebu/dt 2016-02-09 11:18:11 +01:00
Roger Shimizu
44361a2cc1 ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
MTD flash stores u-boot and u-boot environment on linkstation lswtgl.
The latter one can be easily read/write by u-boot-tools package in Debian.

Fixes: dc57844a73 ("ARM: dts: orion5x: add buffalo linkstation ls-wtgl")
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:17:53 +01:00
Heinrich Schuchardt
9d021c9d1b ARM: dts: kirkwood: use unique machine name for ds112
Downstream packages like Debian flash-kernel use
/proc/device-tree/model
to determine which dtb file to install.

Hence each dts in the Linux kernel should provide a unique model
identifier.

Commit 2d0a7addbd ("ARM: Kirkwood: Add support for many Synology NAS
devices") created the new files kirkwood-ds111.dts and kirkwood-ds112.dts
using the same model identifier.

This patch provides a unique model identifier for the
Synology DiskStation DS112.

Fixes: 2d0a7addbd ("ARM: Kirkwood: Add support for many Synology NAS devices")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:17:25 +01:00
Mario Lange
5dda254d0c ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
Add dts file to support Buffalo Linkstation LS-QVL,
which is marvell kirkwood based 4-bay 3.5" HDD NAS.
Product info:
  - (JPN) http://buffalo.jp/product/hdd/network/ls-qvl_r5/
  - (ENG) http://www.buffalotech.com/products/network-storage/home-and-small-office/linkstation-pro-quad

Signed-off-by: Mario Lange <mario_lange@gmx.net>
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:26 +01:00
Aaro Koskinen
34cabc2a58 ARM: dts: kirkwood: fix audio for OpenRD clients
Fix audio on kirkwood-openrd-client:

1) The audio-controller was left disabled.

2) The probe fails because cs42l51 is missing #sound-dai-cells.

	/sound/simple-audio-card,codec: could not get #sound-dai-cells for /ocp@f1000000/i2c@11000/cs42l51@4a
	asoc-simple-card sound: parse error -22
	asoc-simple-card: probe of sound failed with error -22

3) The mapping is incorrect:

	asoc-simple-card sound: cs42l51-hifi <-> spdif mapping ok

   should be:

	asoc-simple-card sound: cs42l51-hifi <-> i2s mapping ok

Reported-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Rick Thomas <rbthomas@pobox.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:26 +01:00
Aaro Koskinen
39ac0979de ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
Some OpenRD boards have RS-232 and RS-486 connectors wired, but using them
needs a custom DTB as the current DTB configures SD card slot instead.

This patch adds documentation into the DTS on how to change
the configuration.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:25 +01:00
Roger Shimizu
60ff189ca0 ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
LS-WVL/VL are both kirkwood-6282 based NAS devices, which share
many MPP pins. However they are slightly different:
  - LS-WVL is 2-Bay NAS, and LS-VL is only 1-Bay.
  - There're two red LED indicator on LS-WVL to show when HDD fails,
    which is similar to LS-WXL, but there's no such on LS-VL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation-6282.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lsvl.dts
  - kirkwood-linkstation-lswvl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:24 +01:00
Roger Shimizu
b05465ff5b ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
LS-WXL/WSXL are both kirkwood-6281 based 2-Bay NAS devices, which share
many MPP pins. However they are slightly different:
  - There're two red LED indicator on LS-WXL to show when HDD fails,
    but there's no such on LS-WSXL.
  - There's 4-level speed adjustable FAN on LS-WXL, but not LS-WSXL.

So after the split, common part goes into .dtsi file:
  - kirkwood-linkstation.dtsi
  - kirkwood-linkstation-duo-6281.dtsi
while all rest part goes into device specific .dts file:
  - kirkwood-linkstation-lswsxl.dts
  - kirkwood-linkstation-lswxl.dts

Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:24 +01:00
Roger Shimizu
3e2f2db885 ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:23 +01:00
Aaro Koskinen
28c494d0c5 ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
The SD card slot was enabled by default with legacy booting.
It does not work anymore with DT boot. Fix by providing GPIO configuration
that matches the old default.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-09 11:00:22 +01:00