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15334 Commits

Author SHA1 Message Date
Denis Efremov
43a562774f drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp() 
Use kfree() instead of kvfree() to free rgb_user in
calculate_user_regamma_ramp() because the memory is allocated with
kcalloc().

Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-10 18:00:24 -04:00
Denis Efremov
81921a828b drm/amd/display: Use kvfree() to free coeff in build_regamma() 
Use kvfree() instead of kfree() to free coeff in build_regamma()
because the memory is allocated with kvzalloc().

Fixes: e752058b86 ("drm/amd/display: Optimize gamma calculations")
Cc: stable@vger.kernel.org
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-10 18:00:24 -04:00
Michel Lespinasse
c1e8d7c6a7 mmap locking API: convert mmap_sem comments 
Convert comments that reference mmap_sem to reference mmap_lock instead.

[akpm@linux-foundation.org: fix up linux-next leftovers]
[akpm@linux-foundation.org: s/lockaphore/lock/, per Vlastimil]
[akpm@linux-foundation.org: more linux-next fixups, per Michel]

Signed-off-by: Michel Lespinasse <walken@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Reviewed-by: Vlastimil Babka <vbabka@suse.cz>
Reviewed-by: Daniel Jordan <daniel.m.jordan@oracle.com>
Cc: Davidlohr Bueso <dbueso@suse.de>
Cc: David Rientjes <rientjes@google.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Jerome Glisse <jglisse@redhat.com>
Cc: John Hubbard <jhubbard@nvidia.com>
Cc: Laurent Dufour <ldufour@linux.ibm.com>
Cc: Liam Howlett <Liam.Howlett@oracle.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ying Han <yinghan@google.com>
Link: http://lkml.kernel.org/r/20200520052908.204642-13-walken@google.com
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
 2020-06-09 09:39:14 -07:00
Michel Lespinasse
d8ed45c5dc mmap locking API: use coccinelle to convert mmap_sem rwsem call sites 
This change converts the existing mmap_sem rwsem calls to use the new mmap
locking API instead.

The change is generated using coccinelle with the following rule:

// spatch --sp-file mmap_lock_api.cocci --in-place --include-headers --dir .

@@
expression mm;
@@
(
-init_rwsem
+mmap_init_lock
|
-down_write
+mmap_write_lock
|
-down_write_killable
+mmap_write_lock_killable
|
-down_write_trylock
+mmap_write_trylock
|
-up_write
+mmap_write_unlock
|
-downgrade_write
+mmap_write_downgrade
|
-down_read
+mmap_read_lock
|
-down_read_killable
+mmap_read_lock_killable
|
-down_read_trylock
+mmap_read_trylock
|
-up_read
+mmap_read_unlock
)
-(&mm->mmap_sem)
+(mm)

Signed-off-by: Michel Lespinasse <walken@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Reviewed-by: Daniel Jordan <daniel.m.jordan@oracle.com>
Reviewed-by: Laurent Dufour <ldufour@linux.ibm.com>
Reviewed-by: Vlastimil Babka <vbabka@suse.cz>
Cc: Davidlohr Bueso <dbueso@suse.de>
Cc: David Rientjes <rientjes@google.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Jerome Glisse <jglisse@redhat.com>
Cc: John Hubbard <jhubbard@nvidia.com>
Cc: Liam Howlett <Liam.Howlett@oracle.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ying Han <yinghan@google.com>
Link: http://lkml.kernel.org/r/20200520052908.204642-5-walken@google.com
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
 2020-06-09 09:39:14 -07:00
Linus Torvalds
107821669a Merge tag 'drm-next-2020-06-08' of git://anongit.freedesktop.org/drm/drm 
Pull drm fixes from Dave Airlie:
 "These are the fixes from last week for the stuff merged in the merge
  window. It got a bunch of nouveau fixes for HDA audio on some new
  GPUs, some i915 and some amdpgu fixes.

  i915:
   - gvt: Fix one clang warning on debug only function
   - Use ARRAY_SIZE for coccicheck warning
   - Use after free fix for display global state.
   - Whitelisting context-local timestamp on Gen9 and two scheduler
     fixes with deps (Cc: stable)
   - Removal of write flag from sysfs files where ineffective

  nouveau:
   - HDMI/DP audio HDA fixes
   - display hang fix for Volta/Turing
   - GK20A regression fix.

  amdgpu:
   - Prevent hwmon accesses while GPU is in reset
   - CTF interrupt fix
   - Backlight fix for renoir
   - Fix for display sync groups
   - Display bandwidth validation workaround"

* tag 'drm-next-2020-06-08' of git://anongit.freedesktop.org/drm/drm: (28 commits)
  drm/nouveau/kms/nv50-: clear SW state of disabled windows harder
  drm/nouveau: gr/gk20a: Use firmware version 0
  drm/nouveau/disp/gm200-: detect and potentially disable HDA support on some SORs
  drm/nouveau/disp/gp100: split SOR implementation from gm200
  drm/nouveau/disp: modify OR allocation policy to account for HDA requirements
  drm/nouveau/disp: split part of OR allocation logic into a function
  drm/nouveau/disp: provide hint to OR allocation about HDA requirements
  drm/amd/display: Revalidate bandwidth before commiting DC updates
  drm/amdgpu/display: use blanked rather than plane state for sync groups
  drm/i915/params: fix i915.fake_lmem_start module param sysfs permissions
  drm/i915/params: don't expose inject_probe_failure in debugfs
  drm/i915: Whitelist context-local timestamp in the gen9 cmdparser
  drm/i915: Fix global state use-after-frees with a refcount
  drm/i915: Check for awaits on still currently executing requests
  drm/i915/gt: Do not schedule normal requests immediately along virtual
  drm/i915: Reorder await_execution before await_request
  drm/nouveau/kms/gt215-: fix race with audio driver runpm
  drm/nouveau/disp/gm200-: fix NV_PDISP_SOR_HDMI2_CTRL(n) selection
  Revert "drm/amd/display: disable dcn20 abm feature for bring up"
  drm/amd/powerplay: ack the SMUToHost interrupt on receive V2
  ...
 2020-06-08 11:31:10 -07:00
Nicholas Kazlauskas
a24eaa5c51 drm/amd/display: Revalidate bandwidth before commiting DC updates 
[Why]
Whenever we switch between tiled formats without also switching pixel
formats or doing anything else that recreates the DC plane state we
can run into underflow or hangs since we're not updating the
DML parameters before committing to the hardware.

[How]
If the update type is FULL then call validate_bandwidth again to update
the DML parmeters before committing the state.

This is basically just a workaround and protective measure against
update types being added DC where we could run into this issue in
the future.

We can only fully validate the state in advance before applying it to
the hardware if we recreate all the plane and stream states since
we can't modify what's currently in use.

The next step is to update DM to ensure that we're creating the plane
and stream states for whatever could potentially be a full update in
DC to pre-emptively recreate the state for DC global validation.

The workaround can stay until this has been fixed in DM.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 15:33:06 -04:00
Alex Deucher
b7f839d292 drm/amdgpu/display: use blanked rather than plane state for sync groups 
We may end up with no planes set yet, depending on the ordering, but we
should have the proper blanking state which is either handled by either
DPG or TG depending on the hardware generation.  Check both to determine
the proper blanked state.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/781
Fixes: 5fc0cbfad4 ("drm/amd/display: determine if a pipe is synced by plane state")
Cc: nicholas.kazlauskas@amd.com
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
 2020-06-03 15:32:34 -04:00
Likun Gao
886c8bc6c1 drm/amd/powerplay: enable PPT and TDC for sienna_cichlid 
Enable PPT and TDC for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:14 -04:00
Likun Gao
1d5ca71345 drm/amd/powerplay: support to get power index for sienna_cichlid 
Add function to get smu power index for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:13 -04:00
Likun Gao
1c58d4295b drm/amd/powerplay: enable Fan control for sienna_cichlid 
Support for Advanced Fan Control (AFC+) for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:13 -04:00
Likun Gao
20d71dcc7c drm/amd/powerplay: enable GFX SS for sienna_cichlid 
Enable Graphics Clock (GFXCLK) Spread Spectrum for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:13 -04:00
Likun Gao
5cb7435319 drm/amd/powerplay: enable LCLK DPM for sienna_cichlid 
Enable LCLK DPM for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:12 -04:00
Likun Gao
b7d25b5f67 drm/amd/powerplay: support to print pcie levels for sienna_cichlid 
Support to print PCIE clk levels for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:12 -04:00
Likun Gao
08ccfe084c drm/amd/powerplay: support pcie value set and update for sienna_cichlid 
Add support to set default pcie parameters for sienna_cichlid.
Add support to update pcie parameters for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:11 -04:00
Likun Gao
5f338f7060 drm/amd/powerplay: enable DCEFCLK DPM and DS for sienna_cichlid 
Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid.
Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:11 -04:00
Likun Gao
9aa6021340 drm/amd/powerplay: Enable SOCCLK ULV for sienna_cichlid 
Enable FW DSTATE for sienna_cichlid.
Enable DF CSTATE for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:10 -04:00
Likun Gao
02bb391d91 drm/amd/powerplay: make gfx ds can be configure for sienna_cichlid 
Make GFX deep sleep can be configure for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:10 -04:00
Likun Gao
65297d5017 drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlid 
Enable uclk dpm for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:09 -04:00
Likun Gao
094cdf15e9 drm/amdgpu/powerplay: set Thermal control for sienna_cichlid 
Enable Auto Thermal Throttling for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:09 -04:00
Likun Gao
983ab9f284 drm/amd/powerplay: enable SOC Clock Deep Sleep for sienna_cichlid 
Enable System On Chip Clock Deep Sleep for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:08 -04:00
Likun Gao
15dbe18fa6 drm/amd/powerplay: enable Graphics Clock Deep Sleep for sienna_cichlid 
Enable Graphics Clock Deep Sleep for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:08 -04:00
Likun Gao
62c1ea6bba drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlid 
Support Ultra Low Voltage for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:07 -04:00
Likun Gao
4cd4f45b65 drm/amd/powerplay: set FCLK DPM for sienna_cichlid 
Support for FCLK DPM for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:07 -04:00
Likun Gao
fea905d471 drm/amd/powerplay: set SOCCLK DPM for sienna_cichlid 
Support for SOCCLK DPM for sienna_cichlid.
Use feature mask to control DPM for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:06 -04:00
Likun Gao
9ad9c8acc8 drm/amd/powerplay: add support to set performance level for sienna_cichlid 
Support for performance level set for sienna_cichlid.
Set standard performance level not fully support, will set to auto
performance level.
Set peak performance level not fully support, will do nothing with it.
Force clk level only support for 2 level for fine grained DPM.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:06 -04:00
Likun Gao
b455159c05 drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2) 
SMU11 based similar to navi1x.

v2: squash in SMU IF updates

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:05 -04:00
Likun Gao
9a98676007 drm/amdgpu: add virtual display support for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:05 -04:00
Likun Gao
58139a42dc drm/amdgpu/gfx10: change register configure for sienna_cichlid 
Update sienna_cichlid register configuration for sienna_cichlid
to match the update of header files.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:05 -04:00
Likun Gao
d682a353f3 drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:04 -04:00
Likun Gao
157e72e831 drm/amdgpu: add sdma ip block for sienna_cichlid (v5) 
Sienna_Cichlid have 4 sdma controllers.

v2: add missing license to sdma_common.h (Alex)
v3: rebase (Alex)
v4: squash in policy fix (Alex)
v4: squash in fw_name fix

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:04 -04:00
Likun Gao
06ff634c0d drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2) 
Add irq src headers for additional SDMA blocks.

v2: Add missing licenses (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:03 -04:00
Likun Gao
933c8a93e2 drm/amdgpu: add gfx ip block for sienna_cichlid (v3) 
Add support for GC 10.3.

v2: Squash in gb_addr_config fix (Alex)
v3: Add num_pkrs support (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:03 -04:00
Likun Gao
757b3af8ec drm/amdgpu: add ih ip block for sienna_cichlid 
Update IH handling for sienna_cichlid

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:02 -04:00
Likun Gao
0b3df16b5a drm/amdgpu: add gmc ip block for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:02 -04:00
Likun Gao
af01d47d3c drm/amdgpu: add support gfxhub for sienna_cichlid (v3) 
GFX10.3 is used for sienna_cichlid.

v2: squash in BANK_SELECT and FRAGMENT_SIZE fixes (Alex)
v3: squash in smallk update (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:01 -04:00
Likun Gao
ffffb96d11 drm/amdgpu: add support on mmhub for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:01 -04:00
Likun Gao
2e1ba10e92 drm/amdgpu/soc15: add common ip block for sienna_cichlid 
Add common ip block for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:00 -04:00
Likun Gao
dccdbf3f96 drm/amdgpu: initialize IP offset for sienna_cichlid (v2) 
Add IP offset headers and state.

V2: squash in updates (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:52:00 -04:00
Likun Gao
117910ed92 drm/amdgpu/soc15: add support for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:59 -04:00
Likun Gao
2f7f522722 drm/amdgpu/gfx10: add clockgating support for sienna_cichlid 
Same as navi10.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:59 -04:00
Likun Gao
57d706026f drm/amdgpu/gmc10: add sienna_cichlid support 
Same as navi10.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:58 -04:00
Likun Gao
6c06333073 drm/amdgpu/gfx10: add support for sienna_cichlid firmware 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:58 -04:00
Likun Gao
11e8aef52e drm/amdgpu: set asic family and ip blocks for sienna_cichlid 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:57 -04:00
Likun Gao
d4f3c3905b drm/amdgpu: set fw load type for sienna_cichlid 
Same as Navi1x.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:57 -04:00
Likun Gao
c0a43457dc drm/amdgpu: add sienna_cichlid gpu info firmware v2 
gpu info fw contains chip specific parameters.

v2: fix fw_name

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:57 -04:00
Likun Gao
ccaf72d3c2 drm/amdgpu: add sienna_cichlid asic type 
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:56 -04:00
Jerry (Fangzhi) Zuo
241b2ec931 drm/amd/display: Add dcn30 Headers (v2) 
DCN 3.0 display controller registers

v2: squash in updates from Bhawan.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:56 -04:00
Leo Liu
a5a2597771 drm/amdgpu: add VCN3.0 register headers (v2) 
Sienna_Cichlid VCN headers

v2: squash in updates (Alex)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:55 -04:00
Yong Zhao
e54294d665 drm/amdgpu: Add ATHUB 2.1 header files (v2) 
v2: squash in updates (Alex)

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:55 -04:00
Likun Gao
b4ebd8717e drm/amdgpu: add GC 10.3 header files (v2) 
Add GC10.3 related header files.

v2: squash in updates (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-06-03 13:51:54 -04:00