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3154 Commits

Author SHA1 Message Date
Alex Deucher
d319c2bcc6 drm/amdgpu/vi: add missing error handling when setting uvd dclk 
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:59 -04:00
Alex Deucher
8085c69968 drm/amdgpu/vi: remove duplicate CG flags 
GFX_MGLS was added twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:58 -04:00
Andrew F. Davis
93a4aec218 drm/amd/powerplay: remove unneeded conversions to bool 
Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:58 -04:00
Andrew F. Davis
7e91366420 drm/amdgpu: remove unneeded conversions to bool 
Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:57 -04:00
Andres Rodriguez
c98b5c9714 drm/amdgpu: add macro to retrieve timeline name v2 
This helps de-duplicate a long expression and removes overly long lines.

v2: Rename macro and undef it

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:56 -04:00
Andres Rodriguez
ced2ef66dc drm/amdgpu: replace fence pointer with fence data in traces 
Fence data is easier to read and allows us to correlate to identify
corresponding dma_fence ftrace events.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:56 -04:00
Andres Rodriguez
2359419fa5 drm/amdgpu: remove useless pointers from traces 
Remove pointers which provide redundant information which is already
easier to deduce from other fields.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:55 -04:00
Andres Rodriguez
f6fd20304a drm/amdgpu: use sched_job id instead of pointer for tracing 
Pointers get reallocated and they are hard to read for humans. Use ids
instead.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:54 -04:00
Andres Rodriguez
373eadfa6a drm/amdgpu: more ftrace formatting consistency fixes 
Consistent formatting makes it easier to read the logs and apply simple
awk oneliners.

I missed some of these on my last patch.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:54 -04:00
Andres Rodriguez
93f8b36738 drm/amd/sched: add a unique job id to amd_sched_job 
A unique id is useful for debugging and tracing. Intended to replace
pointers in ftrace output.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:53 -04:00
Roger.He
8fb6e528c3 drm/amdgpu: increase IH ring buffer size to avoid overflow 
We originally limited the IH to 4k on tonga since it
uses bus addresses directly rather than GPU MC addresses,
so it needs contigous physical memory.  This brings it
inline with other asics.

Signed-off-by: Roger.He <Hongbo.He@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:53 -04:00
Alex Deucher
d2d51d8192 drm/amdgpu: don't init GDS pool if GDS size is 0 (v2) 
SI cards don't expose GDS as a separate pool.  The CP manages
GDS and the UMDs use special CP packets to allocate GDS memory.

v2: drop extra whitespace change

bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:52 -04:00
Alex Deucher
11ba13e179 drm/amdgpu/gfx6: drop gds unrefs 
Leftover from gfx7 code.  gfx6 never sets up the gds buffers
in the first place.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:51 -04:00
Rex Zhu
2667989927 drm/amdgpu: refine vce_3.0 code. 
fix logic error in hw_fini and
set_clockgating_state functions.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:51 -04:00
Rex Zhu
03a5f1df5b drm/amdgpu: refine vce2.0 dpm sequence 
start vce first then enable vce dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:50 -04:00
Alex Deucher
8285052ef1 drm/amdgpu: add new ATIF ACPI method 
Used for fetching external GPU information.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:49 -04:00
Leo Liu
166c8178fb drm/amdgpu: get cs support of AMDGPU_HW_IP_UVD_ENC 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:48 -04:00
Leo Liu
63defd3f67 drm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info query 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:47 -04:00
Leo Liu
50c3e23299 drm/amdgpu: add uvd enc ring type and functions 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:46 -04:00
Leo Liu
a28f0a164c drm/amdgpu: add uvd enc run queue 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:46 -04:00
Leo Liu
f7243053c2 drm/amdgpu: add uvd enc rings 
And initialize them

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:45 -04:00
Leo Liu
5e5681788b drm/amdgpu: move amdgpu_vce structure to vce header 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:44 -04:00
Leo Liu
4df654d293 drm/amdgpu: move amdgpu_uvd structure to uvd header 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:44 -04:00
Leo Liu
135d4735d8 drm/amdgpu: add a ring func for end command 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:43 -04:00
Huang Rui
c773a632a9 drm/amdgpu: add DF MGCG flag 
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:42 -04:00
Huang Rui
e929c98d2e drm/amdgpu: add DRM MGCG header 
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:42 -04:00
Alex Deucher
bbf282d884 drm/amdgpu: add asic callback to get memsize register 
Newer asics use different registers so abstract it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:41 -04:00
Rex Zhu
c722865a19 drm/amdgpu: check function points valid before use. (v3) 
v2: agd: integrate Christian's comments.
v3: print error message if call fails

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:41 -04:00
Alex Xie
5463545b92 drm/amdgpu: add a callback to set vm mapping flags 
This lets each asic set whichever flags it supports.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:40 -04:00
Alex Xie
4b98e0c4ae drm/amdgpu: set GART PTE asic specific flags 
Set asic specific gart pte flags in the gmc IP module for
each asic.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:39 -04:00
Huang Rui
daf42c314d drm/amdgpu: add a ucode size member into firmware info 
This will be used for newer asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:39 -04:00
Chunming Zhou
6b777607c1 drm/amdgpu: expand pte flags to uint64_t 
Necessary for new asics.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:38 -04:00
Alex Deucher
7ccf5aa8ba drm/amdgpu/ih: store the full context id 
The contextID field (formerly known as src_data) of the IH
vector stores client specific information about an interrupt.
It was expanded from 32 bits to 128 on newer asics.  Expand the
src_id field to handle this.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:37 -04:00
Alex Deucher
d766e6a393 drm/amdgpu: switch ih handling to two levels (v3) 
Newer asics have a two levels of irq ids now:
client id - the IP
src id - the interrupt src within the IP

v2: integrated Christian's comments.
v3: fix rebase fail in SI and CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:37 -04:00
Ken Wang
832be4041d drm/amdgpu: add 64bit doorbell functions (v2) 
Newer asics need 64 bit doorbells.

v2: fix comment (Nils)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:36 -04:00
Ken Wang
7014285ade drm/amdgpu: add 64bit wb functions 
Newer asics need 64 bit writeback slots.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:35 -04:00
Ken Wang
536fbf946c drm/amdgpu: change wptr to 64 bits (v2) 
Newer asics need 64 bit wptrs.  If the wptr is now
smaller than the rptr that doesn't indicate a wrap-around
anymore.

v2: integrate Christian's comments.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:35 -04:00
Junwei Zhang
8fe733289b drm/amdgpu: init aperture definitions (v2) 
v2: agd: move apertures to mc structure

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:34 -04:00
Daniel Vetter
04e30c9c86 drm/amdgpu: Merge pre/postclose hooks 
Again no apparent explanation for the split except hysterical raisins.
Merging them also makes it a bit more obviuos what's going on wrt the
runtime pm refdancing.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:33 -04:00
Andres Rodriguez
82c6bd46bf drm/amdgpu: trace fence details in amdgpu_sched_run_job 
This information is intended to provide the required data to associate
amdgpu tracepoints with their corresponding dma_fence_* events.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:32 -04:00
Andres Rodriguez
f8d569011c drm/amdgpu: make trace format uniform csv name=value 
Most of the traces have uniform format except for two of them. Having
all the traces match makes it simple to run awk on the ftrace output.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:31 -04:00
Xiangliang Yu
49abb980c5 drm/amdgpu/gfx8: move CE&DE meta data structure to vi_structs.h 
Because different HWs have different definition for CE & DE meta
data, follow mqd design to move the structures to vi_structs.h.

And change the prefix from amdgpu to vi as the structures is only
for VI family.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:31 -04:00
Junshan Fang
7dae618174 drm/amd/amdgpu: add DID for Polaris10 
Signed-off-by: Junshan Fang <Junshan.Fang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:30 -04:00
Alex Deucher
2fc5338494 drm/amdgpu: add polaris12 to virtual dce handling 
Was missed when polaris12 support was added.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:30 -04:00
Christian König
81522f71b1 drm/amdgpu: remove unused sync testing 
Not used in a while.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:29 -04:00
Eric Huang
35011d398e drm/amd/powerplay: simplify avfs control code in smu7 
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:28 -04:00
Eric Huang
f9c993ceb1 drm/amd/powerplay: add function avfs control in smu7 
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:28 -04:00
Eric Huang
dd4bdf3b35 drm/amd/powerplay: add voltage change support through pp_table 
Disable avfs to make voltage change take effect.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:27 -04:00
Rex Zhu
cf4270ec68 drm/amdgpu: print full bios version in dmesg. 
v2: fix merge error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:26 -04:00
Christian König
c5cb934ebd drm/amdgpu: disable HDP flushes on APUs 
We completely bypass the HDP now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-03-29 23:53:25 -04:00