To fit with latest rtc driver updates, rtc st,syscfg property must contain
the control register offset of pwrcfg and the mask corresponding to the
DBP (Disable Backup Protection) bit.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
To fit with latest rtc driver updates, rtc st,syscfg property must contain
the control register offset of pwrcfg and the mask corresponding to the
DBP (Disable Backup Protection) bit.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
4.18, please pull the following:
- Ray fixes the I2C and PCIe interrupt types for the Cygnus SoC
- Florian fixes the I2C and PCIe interrupts for the Northstar
(BCM5301x), Northstar Plus and Hurricane 2 SoCs
* tag 'arm-soc/for-4.18/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: Cygnus: Fix PCIe controller interrupt type
ARM: dts: Cygnus: Fix I2C controller interrupt type
ARM: dts: BCM5301x: Fix i2c controller interrupt type
ARM: dts: HR2: Fix interrupt types for i2c and PCIe
ARM: dts: NSP: Fix PCIe controllers interrupt types
ARM: dts: NSP: Fix i2c controller interrupt type
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX fixes for 4.18:
- Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be
properly propagated to the upstream interrupt controller.
- Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference
Manual are incorrect.
- Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that
the SPI controller RX FIFO was not empty after a DMA transfer, and
the driver gets stuck in the next PIO transfer when reading one word
more than expected.
* tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6sx: fix irq for pcie bridge
soc: imx: gpcv2: correct PGC offset
ARM: dts: imx6q: Use correct SDMA script for SPI5 core
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu fixes for 4.17 (part 2)
- Use correct size for ICU nodes (irq controller) on Armada 7K/8K
- Fix "#cooling-cells" property's name on Synology DS116 (Armada 385)
* tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu:
arm: dts: armada: Fix "#cooling-cells" property's name
arm64: dts: marvell: fix CP110 ICU node size
Signed-off-by: Olof Johansson <olof@lixom.net>
The Raspberry Pi Compute Module (CM1) is a SoM which contains a
BCM2835 processor, 512 MB RAM and a 4 GB eMMC. There is also a carrier
board which is called Compute Module IO Board.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Make each SoC dtsi use its soc specific PMc compatible string. This solves
a potential issue on at91sam9261 and at91sam9263 when using suspend to RAM
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Use the correct IRQ line for the MSI controller in the PCIe host
controller. Apparently a different IRQ line is used compared to other
i.MX6 variants. Without this change MSI IRQs aren't properly propagated
to the upstream interrupt controller.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Fixes: b1d17f68e5 ("ARM: dts: imx: add initial imx6sx device tree source")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Two different regulators are defined with the same name and label but
distinct properties.
The first definition was added with the first board dts and the second
was added when upstream added flexcan support.
Looking at schematics it is indeed gpio2 14 connected to the STB pin of
the CAN transceiver so remove the first definition.
The second definition entirely overrides the first so this already
worked and this patch results in no DTB change, just a cleanup.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following sensors are on I2C3 on the baseboard:
* isil,isl29023 light sensor
* fsl,mag3110 magnetometer
* fsl,mma8451 accelerometer
Added under i2cmux/i2c@1 because they're not otherwise accessible.
These are all supported by iio with following configs:
* CONFIG_SENSORS_ISL29018
* CONFIG_MAG3110
* CONFIG_MMA8452
Tested with raw reads from iio sysfs.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OV5640 Camera sensor is connected in i.CoreM6 1.5 Quad/Dual MIPI
starter kit.
This patch also move MX6QDL_PAD_GPIO_0__CCM_CLKO1 pinctrl
from i2c3 to ov5640 pinctrl.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.
notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The RMI4 touchscreen driver applied inversion and axis swap in the
wrong order, violating the DT binding for those properties. This is
fixed now, so correct the RDU2 DT to apply the inversion to the
correct axis.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix PCIe controller interrupt to use IRQ_TYPE_LEVEL_HIGH for Broadcom
Cygnus SoC
Fixes: cd590b50a9 ("ARM: dts: enable PCIe support for Cygnus")
Fixes: f6b889358a ("ARM: dts: Enable MSI support for Broadcom Cygnus")
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The i2c controller should be using IRQ_TYPE_LEVEL_HIGH, fix that.
Fixes: bb097e3e00 ("ARM: dts: BCM5301X: Add I2C support to the DT")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The i2c and PCIe controllers had an incorrect type which should have
been set to IRQ_TYPE_LEVEL_HIGH, fix that.
Fixes: b9099ec754 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The interrupts for the PCIe controllers should all be of type
IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE.
Fixes: d71eb94120 ("ARM: dts: NSP: Add MSI support on PCI")
Fixes: 522199029f ("ARM: dts: NSP: Fix PCIE DT issue")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The i2c controller should use IRQ_TYPE_LEVEL_HIGH instead of
IRQ_TYPE_NONE.
Fixes: 0f9f27a36d ("ARM: dts: NSP: Add I2C support to the DT")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
When using the board files the LCD works, but not with the DT.
This adds enables the original da850-evm to work with the same
LCD in device tree mode.
The EVM has a gpio for backlight regulator and a PWM for dimming
the backlight. The LCD and the vpif display pins are mutually
exclusive, so if using the LCD, do not load the vpif driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The DA850-EVM from Logic PD has a SATA port and the module that went
with the kit supports it as well. This patch enables SATA controller.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Fix other missing properties (clocks, OPP, clock latency) as well to
make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[follow conversion to operating-points-v2]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Operating points need to be present in each cpu core using it, not only
the first one. With operating-points-v1 this would require duplicating
this table into each cpu node.
With opp-v2 we can share the same table on all nodes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Add PMIC nodes to Porter and connect CPU DVFS supply. There is
one DA9063L and one DA9210 on Porter, the only difference from
the other boards is that DA9063L is at I2C address 0x5a rather
than 0x58 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Fix other missing properties (clocks, clock-names) as well to make it all
work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Fix other missing properties (clocks, OPP, clock latency) as well to
make it all work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Update all 32bit rockchip devicetree files to use SPDX-License-Identifiers.
All files except rk3288-veyron-analog-audio.dtsi (which is GPL 2.0 only)
claim to be GPL and X11 while the actual license text is MIT. Use the
MIT SPDX tag for them.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Brian Norris <briannorris@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The updated dtc emits a warning for the edp-panel of two rk3288 boards:
Warning (graph_endpoint): /dp@ff970000/ports/port@1/endpoint: graph node unit address error, expected "0"
Fix this by adding the necessary @0 to the endpoint node.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable USB OTG (dual-role) on the Wandboard.
Note, that the USB_OTG_VBUS current is quite limited due to a 22R resistor
in the power line. Hence, the overcurrent signal of 1A will never be
triggered on this board.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To match the convention, move regulator-fixed nodes directly into
the root node.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To match the convention, move all regulator-fixed nodes directly into
the root node.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit provides support for HSC and DDC boards from
Kieback&Peter GmbH vendor.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the reference manual the shp_2_mcu / mcu_2_shp
scripts must be used for devices connected through the SPBA.
This fixes an issue we saw with DMA transfers.
Sometimes the SPI controller RX FIFO was not empty after a DMA
transfer and the driver got stuck in the next PIO transfer when
it read one word more than expected.
commit dd4b487b32 ("ARM: dts: imx6: Use correct SDMA script
for SPI cores") is fixing the same issue but only for SPI1 - 4.
Fixes: 677940258d ("ARM: dts: imx6q: enable dma for ecspi5")
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for an optional device-tree property that
makes the driver skip all the delays around clocking the
GPIOs and set it in the device-tree of common POWER9 based
OpenPower platforms.
This useful on chips like the AST2500 where the GPIO block is
running at a fairly low clock frequency (25Mhz typically). In
this case, the delays are unnecessary and due to the low
precision of the timers, actually quite harmful in terms of
performance.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Christopher Bostic <cbostic@linux.vnet.ibm.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Pull ARM SoC late updates from Olof Johansson:
"This is a branch with a few merge requests that either came in late,
or took a while longer for us to review and merge than usual and thus
cut it a bit close to the merge window. We stage them in a separate
branch and if things look good, we still send them up -- and that's
the case here.
This is mostly DT additions for Renesas platforms, adding IP block
descriptions for existing and new SoCs.
There are also some driver updates for Qualcomm platforms for SMEM/QMI
and GENI, which is their generalized serial protocol interface"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits)
soc: qcom: smem: introduce qcom_smem_virt_to_phys()
soc: qcom: qmi: fix a buffer sizing bug
MAINTAINERS: Update pattern for qcom_scm
soc: Unconditionally include qcom Makefile
soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
soc: qcom: smem: fix qcom_smem_set_global_partition()
soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
soc: qcom: smem: byte swap values properly
soc: qcom: smem: return proper type for cached entry functions
soc: qcom: smem: fix first cache entry calculation
soc: qcom: cmd-db: Make endian-agnostic
drivers: qcom: add command DB driver
arm64: dts: renesas: salvator-common: Add ADV7482 support
ARM: dts: r8a7740: Add CEU1
ARM: dts: r8a7740: Add CEU0
arm64: dts: renesas: salvator-common: enable VIN
arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a7795-es1: add CSI-2 node
...
Pull ARM SoC device tree updates from Olof Johansson:
"As always, a large number of DT updates. Too many to enumerate them
all, but at a glance:
New SoCs introduced in this release:
- Amlogic:
+ Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some
set top boxes and other products.
- Mediatek:
+ MT7623A, which is a flavor of the MT7623 family with other
on-chip ethernet options.
- Qualcomm:
+ SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
(Cortex-A75/A55 derivative) SoC that's one of the current
high-end mobile SoCs.
It's great to see mainline support for it. So far, you can't do
much with it, since a lot of peripherals are not yet in the DTs
but driver support for USB, GPU and other pieces are starting to
trickle in. This might end up being a well-supported SoC
upstream if the momentum keeps up.
- Renesas:
+ R8A77990, a.k.a R-Car E3, a new automotive
entertainment-targeted SoC. Currently only one Cortex-A53 CPU is
enabled, we are eagerly awaiting more. So far, basic drivers
such as serial, gpios, PMU and ethernet are enabled.
+ R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
GPU. Same here, basic set of drivers such as serial, gpios and
ethernet enabled, and SMP support is also forthcoming.
- STMicroelectronics:
+ STM32F469, very similar tih STM32F429 but with display support
Enhancements to SoCs/platforms (DTS contents, some driver portions
might not be in yet):
- Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
- Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
- Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
- Marvell Berlin2CD: SMP support, thermal sensors
- Mediatek MT7623: Highspeed DMA, audio support
- Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
- Renesas: Watchdog and PMU support across many platforms
- Rockchip RK3399: USB3 OTG support
- Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
- STMicro STM32: Lots of peripherals added to STM32MP175C
- Uniphier: Ethernet support
New boards:
- Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
- Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
- Allwinner A33: Nintendo NES/SuperNES Classic Edition
- Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
- Berlin2CD: Valve Steam Link
- Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
- Broadcom: Raspberry Pi 3 B+
- Mediatek MT7623N and MT7623A: reference boards
- Meson 8M2: Tronsmart MXIII Plus
- NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
- Qualcomm MSM8974: Sony Xperia Z1 Compact support
- Qualcomm SDM845: MTP development board
- Renesas: Ebisu R8A77990 board
- Renesas RZ/G1C: iwg23s: iWave G235-SDB
- TI am335x: Pocketbeagle support"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (448 commits)
ARM: dts: aspeed: Fix hwrng register address
arm64: dts: sprd: whale2: Add the rtc enable clock for watchdog
arm64: dts: sprd: Add GPIO and GPIO keys device nodes
arm64: dts: sprd: fix typo in 'remote-endpoint'
arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
arm64: dts: fix regulator property name for wlan pcie endpoint
arm64: dts: qcom: msm8996: Use UFS_GDSC for UFS
ARM: dts: pxa3xx: fix MMC clocks
ARM: pxa: dts: add pin definitions for extended GPIOs
ARM: pxa: dts: add gpio-ranges to gpio controller
ARM: dts: ipq8074: Enable few peripherals for hk01 board
ARM: dts: ipq8074: Add pcie nodes
ARM: dts: ipq8074: Add peripheral nodes
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
ARM: dts: ipq4019: Change the max opp frequency
...
Pull clk updates from Stephen Boyd:
"This time we have a good set of changes to the core framework that do
some general cleanups, but nothing too major. The majority of the diff
goes to two SoCs, Actions Semi and Qualcomm. A brand new driver is
introduced for Actions Semi so it takes up some lines to add all the
different types, and the Qualcomm diff is there because we add support
for two SoCs and it's quite a bit of data.
Otherwise the big driver updates are on TI Davinci and Amlogic
platforms. And then the long tail of driver updates for various fixes
and stuff follows after that.
Core:
- debugfs cleanups removing error checking and an unused provider API
- Removal of a clk init typedef that isn't used
- Usage of match_string() to simplify parent string name matching
- OF clk helpers moved to their own file (linux/of_clk.h)
- Make clk warnings more readable across kernel versions
New Drivers:
- Qualcomm SDM845 GCC and Video clk controllers
- Qualcomm MSM8998 GCC
- Actions Semi S900 SoC support
- Nuvoton npcm750 microcontroller clks
- Amlogic axg AO clock controller
Removed Drivers:
- Deprecated Rockchip clk-gate driver
Updates:
- debugfs functions stopped checking return values
- Support for the MSIOF module clocks on Rensas R-Car M3-N
- Support for the new Rensas RZ/G1C and R-Car E3 SoCs
- Qualcomm GDSC, RCG, and PLL updates for clk changes in new SoCs
- Berlin and Amlogic SPDX tagging
- Usage of of_clk_get_parent_count() in more places
- Proper implementation of the CDEV1/2 clocks on Tegra20
- Allwinner H6 PRCM clock support and R40 EMAC support
- Add critical flag to meson8b's fdiv2 as temporary fixup for ethernet
- Round closest support for meson's mpll driver
- Support for meson8b nand clocks and gxbb video decoder clocks
- Mediatek mali clks
- STM32MP1 fixes
- Uniphier LD11/LD20 stream demux system clock"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits)
clk: qcom: Export clk_fabia_pll_configure()
clk: bcm: Update and add Stingray clock entries
dt-bindings: clk: Update Stingray binding doc
clk-si544: Properly round requested frequency to nearest match
clk: ingenic: jz4770: Add 150us delay after enabling VPU clock
clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock
clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle
clk: ingenic: jz4770: Change OTG from custom to standard gated clock
clk: ingenic: Support specifying "wait for clock stable" delay
clk: ingenic: Add support for clocks whose gate bit is inverted
clk: use match_string() helper
clk: bcm2835: use match_string() helper
clk: Return void from debug_init op
clk: remove clk_debugfs_add_file()
clk: tegra: no need to check return value of debugfs_create functions
clk: davinci: no need to check return value of debugfs_create functions
clk: bcm2835: no need to check return value of debugfs_create functions
clk: no need to check return value of debugfs_create functions
clk: imx6: add EPIT clock support
clk: mvebu: use correct bit for 98DX3236 NAND
...
