Merge tag 'v4.19-next-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt
Add binding description for devices from MT7623. Clock controller, iommu, JPEG Decoder and SMI conotroller. * tag 'v4.19-next-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI dt-bindings: mediatek: Add JPEG Decoder binding for MT7623 dt-bindings: iommu: mediatek: Add binding for MT7623 dt-bindings: clock: mediatek: add support for MT7623 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
@@ -10,6 +10,7 @@ Required Properties:
|
||||
- "mediatek,mt2712-apmixedsys", "syscon"
|
||||
- "mediatek,mt6797-apmixedsys"
|
||||
- "mediatek,mt7622-apmixedsys"
|
||||
- "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
|
||||
- "mediatek,mt8135-apmixedsys"
|
||||
- "mediatek,mt8173-apmixedsys"
|
||||
- #clock-cells: Must be 1
|
||||
|
@@ -8,6 +8,7 @@ Required Properties:
|
||||
- compatible: Should be one of:
|
||||
- "mediatek,mt2701-audsys", "syscon"
|
||||
- "mediatek,mt7622-audsys", "syscon"
|
||||
- "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
The AUDSYS controller uses the common clk binding from
|
||||
|
@@ -8,6 +8,7 @@ Required Properties:
|
||||
- compatible: Should be:
|
||||
- "mediatek,mt2701-bdpsys", "syscon"
|
||||
- "mediatek,mt2712-bdpsys", "syscon"
|
||||
- "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
The bdpsys controller uses the common clk binding from
|
||||
|
@@ -8,6 +8,7 @@ Required Properties:
|
||||
- compatible: Should be:
|
||||
- "mediatek,mt2701-ethsys", "syscon"
|
||||
- "mediatek,mt7622-ethsys", "syscon"
|
||||
- "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
- #reset-cells: Must be 1
|
||||
|
||||
|
@@ -9,6 +9,7 @@ Required Properties:
|
||||
- compatible: Should be:
|
||||
- "mediatek,mt2701-hifsys", "syscon"
|
||||
- "mediatek,mt7622-hifsys", "syscon"
|
||||
- "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
The hifsys controller uses the common clk binding from
|
||||
|
@@ -9,6 +9,7 @@ Required Properties:
|
||||
- "mediatek,mt2701-imgsys", "syscon"
|
||||
- "mediatek,mt2712-imgsys", "syscon"
|
||||
- "mediatek,mt6797-imgsys", "syscon"
|
||||
- "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
|
||||
- "mediatek,mt8173-imgsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
|
@@ -11,6 +11,7 @@ Required Properties:
|
||||
- "mediatek,mt2712-infracfg", "syscon"
|
||||
- "mediatek,mt6797-infracfg", "syscon"
|
||||
- "mediatek,mt7622-infracfg", "syscon"
|
||||
- "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
|
||||
- "mediatek,mt8135-infracfg", "syscon"
|
||||
- "mediatek,mt8173-infracfg", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
@@ -9,6 +9,7 @@ Required Properties:
|
||||
- "mediatek,mt2701-mmsys", "syscon"
|
||||
- "mediatek,mt2712-mmsys", "syscon"
|
||||
- "mediatek,mt6797-mmsys", "syscon"
|
||||
- "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
|
||||
- "mediatek,mt8173-mmsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
|
@@ -10,6 +10,7 @@ Required Properties:
|
||||
- "mediatek,mt2701-pericfg", "syscon"
|
||||
- "mediatek,mt2712-pericfg", "syscon"
|
||||
- "mediatek,mt7622-pericfg", "syscon"
|
||||
- "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon"
|
||||
- "mediatek,mt8135-pericfg", "syscon"
|
||||
- "mediatek,mt8173-pericfg", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
@@ -10,6 +10,7 @@ Required Properties:
|
||||
- "mediatek,mt2712-topckgen", "syscon"
|
||||
- "mediatek,mt6797-topckgen"
|
||||
- "mediatek,mt7622-topckgen"
|
||||
- "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen"
|
||||
- "mediatek,mt8135-topckgen"
|
||||
- "mediatek,mt8173-topckgen"
|
||||
- #clock-cells: Must be 1
|
||||
|
@@ -9,6 +9,7 @@ Required Properties:
|
||||
- "mediatek,mt2701-vdecsys", "syscon"
|
||||
- "mediatek,mt2712-vdecsys", "syscon"
|
||||
- "mediatek,mt6797-vdecsys", "syscon"
|
||||
- "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
|
||||
- "mediatek,mt8173-vdecsys", "syscon"
|
||||
- #clock-cells: Must be 1
|
||||
|
||||
|
@@ -41,6 +41,8 @@ Required properties:
|
||||
- compatible : must be one of the following string:
|
||||
"mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW.
|
||||
"mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW.
|
||||
"mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses
|
||||
generation one m4u HW.
|
||||
"mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW.
|
||||
- reg : m4u register base and size.
|
||||
- interrupts : the interrupt of m4u.
|
||||
@@ -51,7 +53,7 @@ Required properties:
|
||||
according to the local arbiter index, like larb0, larb1, larb2...
|
||||
- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
|
||||
Specifies the mtk_m4u_id as defined in
|
||||
dt-binding/memory/mt2701-larb-port.h for mt2701,
|
||||
dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
|
||||
dt-binding/memory/mt2712-larb-port.h for mt2712, and
|
||||
dt-binding/memory/mt8173-larb-port.h for mt8173.
|
||||
|
||||
|
@@ -5,6 +5,7 @@ Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
|
||||
Required properties:
|
||||
- compatible : must be one of the following string:
|
||||
"mediatek,mt8173-jpgdec"
|
||||
"mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
|
||||
"mediatek,mt2701-jpgdec"
|
||||
- reg : physical base address of the jpeg decoder registers and length of
|
||||
memory mapped region.
|
||||
|
@@ -17,6 +17,7 @@ Required properties:
|
||||
- compatible : must be one of :
|
||||
"mediatek,mt2701-smi-common"
|
||||
"mediatek,mt2712-smi-common"
|
||||
"mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
|
||||
"mediatek,mt8173-smi-common"
|
||||
- reg : the register and size of the SMI block.
|
||||
- power-domains : a phandle to the power domain of this local arbiter.
|
||||
|
@@ -6,6 +6,7 @@ Required properties:
|
||||
- compatible : must be one of :
|
||||
"mediatek,mt2701-smi-larb"
|
||||
"mediatek,mt2712-smi-larb"
|
||||
"mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
|
||||
"mediatek,mt8173-smi-larb"
|
||||
- reg : the register and size of this local arbiter.
|
||||
- mediatek,smi : a phandle to the smi_common node.
|
||||
@@ -16,7 +17,7 @@ Required properties:
|
||||
the register.
|
||||
- "smi" : It's the clock for transfer data and command.
|
||||
|
||||
Required property for mt2701 and mt2712:
|
||||
Required property for mt2701, mt2712 and mt7623:
|
||||
- mediatek,larb-id :the hardware id of this larb.
|
||||
|
||||
Example:
|
||||
|
Reference in New Issue
Block a user