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ARM: dts: uniphier: fix size of sdctrl nodes

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All registers are located within 0x400 size from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada
2017-08-27 21:02:31 +09:00
parent 80a687041a
commit 7b8330d28c
2 changed files with 2 additions and 2 deletions
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2
arch/arm/boot/dts/uniphier-pro5.dtsi
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@@ -292,7 +292,7 @@
sdctrl@59810000 {
compatible = "socionext,uniphier-pro5-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
reg = <0x59810000 0x400>;
sd_clk: clock {
compatible = "socionext,uniphier-pro5-sd-clock";

2
arch/arm/boot/dts/uniphier-pxs2.dtsi
View File

@@ -276,7 +276,7 @@
sdctrl@59810000 {
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
reg = <0x59810000 0x400>;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";