iwlwifi: dbg: remove multi buffers infra
Legacy DRAM monitor does not support multi buffers. Remove this infra. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:

committed by
Luca Coelho

parent
3b589d5624
commit
69f0e5059b
@@ -706,8 +706,7 @@ struct iwl_self_init_dram {
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* pointers was recevied via TLV. uses enum &iwl_error_event_table_status
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* @internal_ini_cfg: internal debug cfg state. Uses &enum iwl_ini_cfg_state
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* @external_ini_cfg: external debug cfg state. Uses &enum iwl_ini_cfg_state
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* @num_blocks: number of blocks in fw_mon
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* @fw_mon: address of the buffers for firmware monitor
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* @fw_mon: DRAM buffer for firmware monitor
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* @hw_error: equals true if hw error interrupt was received from the FW
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* @ini_dest: debug monitor destination uses &enum iwl_fw_ini_buffer_location
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* @active_regions: active regions
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@@ -727,8 +726,7 @@ struct iwl_trans_debug {
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enum iwl_ini_cfg_state internal_ini_cfg;
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enum iwl_ini_cfg_state external_ini_cfg;
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int num_blocks;
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struct iwl_dram_data fw_mon[IWL_FW_INI_ALLOCATION_NUM];
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struct iwl_dram_data fw_mon;
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bool hw_error;
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enum iwl_fw_ini_buffer_location ini_dest;
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@@ -96,13 +96,14 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans,
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cpu_to_le64(trans_pcie->rxq->bd_dma);
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/* Configure debug, for integration */
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if (!iwl_trans_dbg_ini_valid(trans))
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if (iwl_trans_dbg_ini_valid(trans)) {
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iwl_pcie_alloc_fw_monitor(trans, 0);
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if (trans->dbg.num_blocks) {
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prph_sc_ctrl->hwm_cfg.hwm_base_addr =
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cpu_to_le64(trans->dbg.fw_mon[0].physical);
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prph_sc_ctrl->hwm_cfg.hwm_size =
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cpu_to_le32(trans->dbg.fw_mon[0].size);
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if (trans->dbg.fw_mon.size) {
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prph_sc_ctrl->hwm_cfg.hwm_base_addr =
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cpu_to_le64(trans->dbg.fw_mon.physical);
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prph_sc_ctrl->hwm_cfg.hwm_size =
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cpu_to_le32(trans->dbg.fw_mon.size);
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}
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}
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/* allocate ucode sections in dram and set addresses */
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@@ -190,32 +190,36 @@ static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans)
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static void iwl_pcie_free_fw_monitor(struct iwl_trans *trans)
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{
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int i;
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struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
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for (i = 0; i < trans->dbg.num_blocks; i++) {
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dma_free_coherent(trans->dev, trans->dbg.fw_mon[i].size,
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trans->dbg.fw_mon[i].block,
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trans->dbg.fw_mon[i].physical);
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trans->dbg.fw_mon[i].block = NULL;
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trans->dbg.fw_mon[i].physical = 0;
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trans->dbg.fw_mon[i].size = 0;
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trans->dbg.num_blocks--;
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}
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if (!fw_mon->size)
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return;
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dma_free_coherent(trans->dev, fw_mon->size, fw_mon->block,
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fw_mon->physical);
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fw_mon->block = NULL;
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fw_mon->physical = 0;
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fw_mon->size = 0;
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}
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static void iwl_pcie_alloc_fw_monitor_block(struct iwl_trans *trans,
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u8 max_power, u8 min_power)
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{
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void *cpu_addr = NULL;
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dma_addr_t phys = 0;
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struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
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void *block = NULL;
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dma_addr_t physical = 0;
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u32 size = 0;
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u8 power;
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if (fw_mon->size)
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return;
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for (power = max_power; power >= min_power; power--) {
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size = BIT(power);
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cpu_addr = dma_alloc_coherent(trans->dev, size, &phys,
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GFP_KERNEL | __GFP_NOWARN);
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if (!cpu_addr)
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block = dma_alloc_coherent(trans->dev, size, &physical,
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GFP_KERNEL | __GFP_NOWARN);
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if (!block)
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continue;
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IWL_INFO(trans,
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@@ -224,7 +228,7 @@ static void iwl_pcie_alloc_fw_monitor_block(struct iwl_trans *trans,
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break;
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}
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if (WARN_ON_ONCE(!cpu_addr))
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if (WARN_ON_ONCE(!block))
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return;
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if (power != max_power)
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@@ -233,10 +237,9 @@ static void iwl_pcie_alloc_fw_monitor_block(struct iwl_trans *trans,
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(unsigned long)BIT(power - 10),
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(unsigned long)BIT(max_power - 10));
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trans->dbg.fw_mon[trans->dbg.num_blocks].block = cpu_addr;
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trans->dbg.fw_mon[trans->dbg.num_blocks].physical = phys;
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trans->dbg.fw_mon[trans->dbg.num_blocks].size = size;
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trans->dbg.num_blocks++;
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fw_mon->block = block;
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fw_mon->physical = physical;
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fw_mon->size = size;
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}
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void iwl_pcie_alloc_fw_monitor(struct iwl_trans *trans, u8 max_power)
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@@ -253,11 +256,7 @@ void iwl_pcie_alloc_fw_monitor(struct iwl_trans *trans, u8 max_power)
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max_power))
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return;
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/*
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* This function allocats the default fw monitor.
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* The optional additional ones will be allocated in runtime
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*/
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if (trans->dbg.num_blocks)
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if (trans->dbg.fw_mon.size)
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return;
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iwl_pcie_alloc_fw_monitor_block(trans, max_power, 11);
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@@ -894,23 +893,11 @@ static int iwl_pcie_load_cpu_sections(struct iwl_trans *trans,
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void iwl_pcie_apply_destination(struct iwl_trans *trans)
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{
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const struct iwl_fw_dbg_dest_tlv_v1 *dest = trans->dbg.dest_tlv;
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const struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
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int i;
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if (iwl_trans_dbg_ini_valid(trans)) {
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if (!trans->dbg.num_blocks)
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return;
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IWL_DEBUG_FW(trans,
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"WRT: Applying DRAM buffer[0] destination\n");
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iwl_write_umac_prph(trans, MON_BUFF_BASE_ADDR_VER2,
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trans->dbg.fw_mon[0].physical >>
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MON_BUFF_SHIFT_VER2);
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iwl_write_umac_prph(trans, MON_BUFF_END_ADDR_VER2,
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(trans->dbg.fw_mon[0].physical +
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trans->dbg.fw_mon[0].size - 256) >>
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MON_BUFF_SHIFT_VER2);
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if (iwl_trans_dbg_ini_valid(trans))
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return;
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}
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IWL_INFO(trans, "Applying debug destination %s\n",
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get_fw_dbg_mode_string(dest->monitor_mode));
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@@ -959,20 +946,17 @@ void iwl_pcie_apply_destination(struct iwl_trans *trans)
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}
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monitor:
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if (dest->monitor_mode == EXTERNAL_MODE && trans->dbg.fw_mon[0].size) {
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if (dest->monitor_mode == EXTERNAL_MODE && fw_mon->size) {
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iwl_write_prph(trans, le32_to_cpu(dest->base_reg),
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trans->dbg.fw_mon[0].physical >>
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dest->base_shift);
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fw_mon->physical >> dest->base_shift);
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if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_8000)
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iwl_write_prph(trans, le32_to_cpu(dest->end_reg),
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(trans->dbg.fw_mon[0].physical +
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trans->dbg.fw_mon[0].size - 256) >>
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dest->end_shift);
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(fw_mon->physical + fw_mon->size -
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256) >> dest->end_shift);
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else
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iwl_write_prph(trans, le32_to_cpu(dest->end_reg),
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(trans->dbg.fw_mon[0].physical +
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trans->dbg.fw_mon[0].size) >>
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dest->end_shift);
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(fw_mon->physical + fw_mon->size) >>
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dest->end_shift);
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}
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}
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@@ -1006,14 +990,14 @@ static int iwl_pcie_load_given_ucode(struct iwl_trans *trans,
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/* supported for 7000 only for the moment */
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if (iwlwifi_mod_params.fw_monitor &&
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trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
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iwl_pcie_alloc_fw_monitor(trans, 0);
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struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
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if (trans->dbg.fw_mon[0].size) {
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iwl_pcie_alloc_fw_monitor(trans, 0);
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if (fw_mon->size) {
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iwl_write_prph(trans, MON_BUFF_BASE_ADDR,
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trans->dbg.fw_mon[0].physical >> 4);
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fw_mon->physical >> 4);
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iwl_write_prph(trans, MON_BUFF_END_ADDR,
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(trans->dbg.fw_mon[0].physical +
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trans->dbg.fw_mon[0].size) >> 4);
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(fw_mon->physical + fw_mon->size) >> 4);
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}
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} else if (iwl_pcie_dbg_on(trans)) {
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iwl_pcie_apply_destination(trans);
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@@ -2801,7 +2785,7 @@ static ssize_t iwl_dbgfs_monitor_data_read(struct file *file,
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{
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struct iwl_trans *trans = file->private_data;
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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void *cpu_addr = (void *)trans->dbg.fw_mon[0].block, *curr_buf;
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void *cpu_addr = (void *)trans->dbg.fw_mon.block, *curr_buf;
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struct cont_rec *data = &trans_pcie->fw_mon_data;
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u32 write_ptr_addr, wrap_cnt_addr, write_ptr, wrap_cnt;
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ssize_t size, bytes_copied = 0;
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@@ -2840,7 +2824,7 @@ static ssize_t iwl_dbgfs_monitor_data_read(struct file *file,
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} else if (data->prev_wrap_cnt == wrap_cnt - 1 &&
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write_ptr < data->prev_wr_ptr) {
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size = trans->dbg.fw_mon[0].size - data->prev_wr_ptr;
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size = trans->dbg.fw_mon.size - data->prev_wr_ptr;
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curr_buf = cpu_addr + data->prev_wr_ptr;
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b_full = iwl_write_to_user_buf(user_buf, count,
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curr_buf, &size,
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@@ -3087,10 +3071,11 @@ iwl_trans_pcie_dump_monitor(struct iwl_trans *trans,
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struct iwl_fw_error_dump_data **data,
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u32 monitor_len)
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{
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struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon;
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u32 len = 0;
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if (trans->dbg.dest_tlv ||
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(trans->dbg.num_blocks &&
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(fw_mon->size &&
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(trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000 ||
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trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210))) {
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struct iwl_fw_error_dump_fw_mon *fw_mon_data;
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@@ -3101,12 +3086,9 @@ iwl_trans_pcie_dump_monitor(struct iwl_trans *trans,
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iwl_trans_pcie_dump_pointers(trans, fw_mon_data);
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len += sizeof(**data) + sizeof(*fw_mon_data);
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if (trans->dbg.num_blocks) {
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memcpy(fw_mon_data->data,
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trans->dbg.fw_mon[0].block,
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trans->dbg.fw_mon[0].size);
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monitor_len = trans->dbg.fw_mon[0].size;
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if (fw_mon->size) {
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memcpy(fw_mon_data->data, fw_mon->block, fw_mon->size);
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monitor_len = fw_mon->size;
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} else if (trans->dbg.dest_tlv->monitor_mode == SMEM_MODE) {
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u32 base = le32_to_cpu(fw_mon_data->fw_mon_base_ptr);
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/*
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@@ -3145,11 +3127,11 @@ iwl_trans_pcie_dump_monitor(struct iwl_trans *trans,
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static int iwl_trans_get_fw_monitor_len(struct iwl_trans *trans, u32 *len)
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{
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if (trans->dbg.num_blocks) {
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if (trans->dbg.fw_mon.size) {
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*len += sizeof(struct iwl_fw_error_dump_data) +
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sizeof(struct iwl_fw_error_dump_fw_mon) +
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trans->dbg.fw_mon[0].size;
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return trans->dbg.fw_mon[0].size;
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trans->dbg.fw_mon.size;
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return trans->dbg.fw_mon.size;
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} else if (trans->dbg.dest_tlv) {
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u32 base, end, cfg_reg, monitor_len;
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