clocksource/drivers/riscv: Make RISCV_TIMER depends on RISCV_SBI
[ Upstream commit ab3105446f1ec4e98fadfc998ee24feec271c16c ]
The riscv timer is set via SBI timer call, let's make RISCV_TIMER
depends on RISCV_SBI, and it also fixes some build issue.
Fixes: d5be89a8d1
("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201028131230.72907-1-wangkefeng.wang@huawei.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
df4411e4b8
commit
16cf69c25c
@@ -654,7 +654,7 @@ config ATCPIT100_TIMER
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config RISCV_TIMER
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bool "Timer for the RISC-V platform" if COMPILE_TEST
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depends on GENERIC_SCHED_CLOCK && RISCV
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depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
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select TIMER_PROBE
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select TIMER_OF
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help
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