Yuan Zhao ffd7e1d4b1 disp: msm: dsi: only check clock lane ulps status for DPHY ...

Clock lane can enter ino ULPS mode only in DPHY mode. For
CPHY, did not need to check the clock lane status for ULPS.

Change-Id: Iceddd8064ec75ce26613469cfb1bde36e883f865
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>

2021-06-24 14:58:23 +08:00

config

disp: enable qseecom hdcp for display port

2021-05-05 23:42:19 -07:00

Documentation/devicetree/bindings/drm/msm

disp: msm: dp: add dp-mst sideband simulator

2021-02-10 22:34:33 -05:00

hdcp

disp: msm: make msm_drm as module for GKI

2020-04-28 15:52:49 -07:00

include

mmm_color_format: update alignment for linear RGBA8888 format

2021-06-13 19:13:15 -07:00

msm

disp: msm: dsi: only check clock lane ulps status for DPHY

2021-06-24 14:58:23 +08:00

rotator

Merge "disp: msm: sde: update smmu fault handler to print debug info"

2021-04-02 18:50:47 -07:00

Android.bp

display: get unifdef explicitly

2021-02-17 09:14:03 -08:00

Android.mk

display-drivers: Fix for hermetic builds

2021-05-07 12:49:37 -07:00

display_driver_board.mk

disp: enable display dlkm to be part of recovery image

2021-05-10 13:49:57 -07:00

display_driver_product.mk

disp: enable display driver compilation in vendor SI

2021-01-15 10:13:54 -08:00

display_kernel_headers.py

display: get unifdef explicitly

2021-02-17 09:14:03 -08:00

Kbuild

disp: add changes to generate display dlkm in android

2021-01-15 00:32:42 -08:00

Makefile

disp: add changes to generate display dlkm in android

2021-01-15 00:32:42 -08:00

Makefile.am

disp: msm: add Makefile.am for standalone dlkm compilation

2021-02-23 17:51:19 -08:00

NOTICE

disp: msm: dp: Move required drm_dp_link functions to downstream

2020-12-17 10:06:32 -05:00

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