
Add support to read cphy boolean flag from panel dtsi and configure DSI PHY registers accordingly. Update the bit/byte clock calculation according to cphy specifications. Update clock parents so that the relevant divider blocks are configured to support cphy. Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
96 KiB
96 KiB