Meng Wang 95c95b2d67 asoc: update digital_cdc_rsc_mgr_hw_vote API ...

Update digital_cdc_rsc_mgr_hw_vote_enable/disable API with device
info for easy debug. Also, add swrm clock enable checks during SSR.
When SSR happens, swrm->hw_core_clk_en and swrm->aud_core_clk_en will
be reset without resetting audio_vote and core_vote clk. This would
cause clk mismatch in audio driver and adsp and device fails suspending
when there's no audio usecase. Make this change to reset audio_vote
and core_vote clk when receiving SWR_DEVICE_SSR_DOWN.

Change-Id: I9875aac9f6faf8b6481457a70f31b005073369e0
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>

2022-05-06 10:50:36 -07:00

40 KiB

Brut Annotations Historique

Voir le Raw