882ac969c2
Add support for direct QMP to communicate with AOP. There are two ways to communicate with AOP: mailbox, and direct QMP, Based on property set in the device tree use either direct QMP or mailbox to send messages to AOP. Change-Id: Iae8302fd2e40181a192a2c9afaebdb807b7cf1c3 CRs-Fixed: 3571108
996 行
23 KiB
C
996 行
23 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <soc/qcom/cmd-db.h>
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#include "main.h"
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#include "qmi.h"
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#include "debug.h"
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#include "power.h"
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static struct icnss_vreg_cfg icnss_wcn6750_vreg_list[] = {
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{"vdd-cx-mx", 824000, 952000, 0, 0, 0, false, true},
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{"vdd-1.8-xo", 1872000, 1872000, 0, 0, 0, false, true},
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{"vdd-1.3-rfa", 1256000, 1352000, 0, 0, 0, false, true},
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};
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static struct icnss_vreg_cfg icnss_adrestea_vreg_list[] = {
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{"vdd-cx-mx", 752000, 752000, 0, 0, 0, false, true},
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{"vdd-1.8-xo", 1800000, 1800000, 0, 0, 0, false, true},
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{"vdd-1.3-rfa", 1304000, 1304000, 0, 0, 0, false, true},
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{"vdd-3.3-ch1", 3312000, 3312000, 0, 0, 0, false, true},
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{"vdd-3.3-ch0", 3312000, 3312000, 0, 0, 0, false, true},
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};
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static struct icnss_battery_level icnss_battery_level[] = {
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{70, 3300000},
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{60, 3200000},
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{50, 3100000},
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{25, 3000000},
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{0, 2850000},
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};
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static struct icnss_vreg_cfg icnss_wcn6450_vreg_list[] = {
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{"vdd-cx-mx", 824000, 952000, 0, 0, 0, false, true},
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{"vdd-1.8-xo", 1872000, 1872000, 0, 0, 0, false, true},
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{"vdd-1.3-rfa", 1256000, 1352000, 0, 0, 0, false, true},
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{"vdd-aon", 1256000, 1352000, 0, 0, 0, false, true},
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};
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static struct icnss_clk_cfg icnss_clk_list[] = {
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{"rf_clk", 0, 0},
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};
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static struct icnss_clk_cfg icnss_adrestea_clk_list[] = {
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{"cxo_ref_clk_pin", 0, 0},
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};
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#define ICNSS_VREG_LIST_SIZE ARRAY_SIZE(icnss_wcn6750_vreg_list)
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#define ICNSS_VREG_ADRESTEA_LIST_SIZE ARRAY_SIZE(icnss_adrestea_vreg_list)
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#define ICNSS_VREG_EVROS_LIST_SIZE ARRAY_SIZE(icnss_wcn6450_vreg_list)
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#define ICNSS_CLK_LIST_SIZE ARRAY_SIZE(icnss_clk_list)
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#define ICNSS_CLK_ADRESTEA_LIST_SIZE ARRAY_SIZE(icnss_adrestea_clk_list)
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#define ICNSS_CHAIN1_REGULATOR "vdd-3.3-ch1"
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#define MAX_PROP_SIZE 32
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#define BT_CXMX_VOLTAGE_MV 950
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#define ICNSS_MBOX_MSG_MAX_LEN 64
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#define ICNSS_MBOX_TIMEOUT_MS 1000
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#define ICNSS_BATTERY_LEVEL_COUNT ARRAY_SIZE(icnss_battery_level)
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#define ICNSS_MAX_BATTERY_LEVEL 100
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/**
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* enum icnss_vreg_param: Voltage regulator TCS param
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* @ICNSS_VREG_VOLTAGE: Provides voltage level to be configured in TCS
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* @ICNSS_VREG_MODE: Regulator mode
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* @ICNSS_VREG_ENABLE: Set Voltage regulator enable config in TCS
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*/
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enum icnss_vreg_param {
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ICNSS_VREG_VOLTAGE,
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ICNSS_VREG_MODE,
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ICNSS_VREG_ENABLE,
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};
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/**
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* enum icnss_tcs_seq: TCS sequence ID for trigger
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* ICNSS_TCS_UP_SEQ: TCS Sequence based on up trigger / Wake TCS
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* ICNSS_TCS_DOWN_SEQ: TCS Sequence based on down trigger / Sleep TCS
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* ICNSS_TCS_ALL_SEQ: Update for both up and down triggers
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*/
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enum icnss_tcs_seq {
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ICNSS_TCS_UP_SEQ,
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ICNSS_TCS_DOWN_SEQ,
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ICNSS_TCS_ALL_SEQ,
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};
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static int icnss_get_vreg_single(struct icnss_priv *priv,
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struct icnss_vreg_info *vreg)
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{
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int ret = 0;
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struct device *dev = NULL;
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struct regulator *reg = NULL;
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const __be32 *prop = NULL;
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char prop_name[MAX_PROP_SIZE] = {0};
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int len = 0;
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int i;
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dev = &priv->pdev->dev;
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reg = devm_regulator_get_optional(dev, vreg->cfg.name);
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if (IS_ERR(reg)) {
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ret = PTR_ERR(reg);
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if (ret == -ENODEV) {
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return ret;
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} else if (ret == -EPROBE_DEFER) {
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icnss_pr_info("EPROBE_DEFER for regulator: %s\n",
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vreg->cfg.name);
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goto out;
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} else if (priv->device_id == ADRASTEA_DEVICE_ID) {
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if (vreg->cfg.required) {
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icnss_pr_err("Regulator %s doesn't exist: %d\n",
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vreg->cfg.name, ret);
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goto out;
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} else {
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icnss_pr_dbg("Optional regulator %s doesn't exist: %d\n",
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vreg->cfg.name, ret);
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goto done;
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}
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} else {
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icnss_pr_err("Failed to get regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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goto out;
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}
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}
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vreg->reg = reg;
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snprintf(prop_name, MAX_PROP_SIZE, "qcom,%s-config",
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vreg->cfg.name);
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prop = of_get_property(dev->of_node, prop_name, &len);
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icnss_pr_dbg("Got regulator config, prop: %s, len: %d\n",
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prop_name, len);
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if (!prop || len < (2 * sizeof(__be32))) {
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icnss_pr_dbg("Property %s %s, use default\n", prop_name,
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prop ? "invalid format" : "doesn't exist");
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goto done;
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}
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for (i = 0; (i * sizeof(__be32)) < len; i++) {
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switch (i) {
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case 0:
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vreg->cfg.min_uv = be32_to_cpup(&prop[0]);
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break;
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case 1:
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vreg->cfg.max_uv = be32_to_cpup(&prop[1]);
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break;
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case 2:
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vreg->cfg.load_ua = be32_to_cpup(&prop[2]);
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break;
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case 3:
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vreg->cfg.delay_us = be32_to_cpup(&prop[3]);
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break;
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case 4:
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if (priv->device_id == WCN6750_DEVICE_ID)
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vreg->cfg.need_unvote = be32_to_cpup(&prop[4]);
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else
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vreg->cfg.need_unvote = 0;
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break;
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default:
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icnss_pr_dbg("Property %s, ignoring value at %d\n",
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prop_name, i);
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break;
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}
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}
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done:
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icnss_pr_dbg("Got regulator: %s, min_uv: %u, max_uv: %u, load_ua: %u, delay_us: %u, need_unvote: %u\n",
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vreg->cfg.name, vreg->cfg.min_uv,
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vreg->cfg.max_uv, vreg->cfg.load_ua,
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vreg->cfg.delay_us, vreg->cfg.need_unvote);
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return 0;
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out:
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return ret;
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}
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static int icnss_vreg_on_single(struct icnss_vreg_info *vreg)
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{
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int ret = 0;
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if (vreg->enabled) {
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icnss_pr_dbg("Regulator %s is already enabled\n",
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vreg->cfg.name);
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return 0;
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}
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icnss_pr_dbg("Regulator %s is being enabled\n", vreg->cfg.name);
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if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
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ret = regulator_set_voltage(vreg->reg,
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vreg->cfg.min_uv,
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vreg->cfg.max_uv);
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if (ret) {
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icnss_pr_err("Failed to set voltage for regulator %s, min_uv: %u, max_uv: %u, err = %d\n",
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vreg->cfg.name, vreg->cfg.min_uv,
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vreg->cfg.max_uv, ret);
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goto out;
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}
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}
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if (vreg->cfg.load_ua) {
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ret = regulator_set_load(vreg->reg,
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vreg->cfg.load_ua);
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if (ret < 0) {
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icnss_pr_err("Failed to set load for regulator %s, load: %u, err = %d\n",
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vreg->cfg.name, vreg->cfg.load_ua,
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ret);
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goto out;
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}
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}
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if (vreg->cfg.delay_us)
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udelay(vreg->cfg.delay_us);
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ret = regulator_enable(vreg->reg);
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if (ret) {
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icnss_pr_err("Failed to enable regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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goto out;
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}
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vreg->enabled = true;
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out:
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return ret;
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}
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static int icnss_vreg_unvote_single(struct icnss_vreg_info *vreg)
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{
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int ret = 0;
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if (!vreg->enabled) {
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icnss_pr_dbg("Regulator %s is already disabled\n",
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vreg->cfg.name);
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return 0;
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}
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icnss_pr_dbg("Removing vote for Regulator %s\n", vreg->cfg.name);
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if (vreg->cfg.load_ua) {
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ret = regulator_set_load(vreg->reg, 0);
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if (ret < 0)
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icnss_pr_err("Failed to set load for regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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}
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if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
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ret = regulator_set_voltage(vreg->reg, 0,
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vreg->cfg.max_uv);
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if (ret)
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icnss_pr_err("Failed to set voltage for regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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}
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return ret;
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}
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static int icnss_vreg_off_single(struct icnss_vreg_info *vreg)
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{
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int ret = 0;
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if (!vreg->enabled) {
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icnss_pr_dbg("Regulator %s is already disabled\n",
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vreg->cfg.name);
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return 0;
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}
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icnss_pr_dbg("Regulator %s is being disabled\n",
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vreg->cfg.name);
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ret = regulator_disable(vreg->reg);
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if (ret)
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icnss_pr_err("Failed to disable regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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if (vreg->cfg.load_ua) {
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ret = regulator_set_load(vreg->reg, 0);
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if (ret < 0)
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icnss_pr_err("Failed to set load for regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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}
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if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
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ret = regulator_set_voltage(vreg->reg, 0,
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vreg->cfg.max_uv);
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if (ret)
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icnss_pr_err("Failed to set voltage for regulator %s, err = %d\n",
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vreg->cfg.name, ret);
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}
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vreg->enabled = false;
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return ret;
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}
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static struct icnss_vreg_cfg *get_vreg_list(u32 *vreg_list_size,
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unsigned long device_id)
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{
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switch (device_id) {
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case WCN6750_DEVICE_ID:
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*vreg_list_size = ICNSS_VREG_LIST_SIZE;
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return icnss_wcn6750_vreg_list;
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case ADRASTEA_DEVICE_ID:
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*vreg_list_size = ICNSS_VREG_ADRESTEA_LIST_SIZE;
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return icnss_adrestea_vreg_list;
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case WCN6450_DEVICE_ID:
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*vreg_list_size = ICNSS_VREG_EVROS_LIST_SIZE;
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return icnss_wcn6450_vreg_list;
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default:
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icnss_pr_err("Unsupported device_id 0x%x\n", device_id);
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*vreg_list_size = 0;
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return NULL;
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}
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}
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int icnss_get_vreg(struct icnss_priv *priv)
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{
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int ret = 0;
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int i;
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struct icnss_vreg_info *vreg;
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struct icnss_vreg_cfg *vreg_cfg = NULL;
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struct list_head *vreg_list = &priv->vreg_list;
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struct device *dev = &priv->pdev->dev;
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u32 vreg_list_size = 0;
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vreg_cfg = get_vreg_list(&vreg_list_size, priv->device_id);
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if (!vreg_cfg)
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return -EINVAL;
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for (i = 0; i < vreg_list_size; i++) {
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vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
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if (!vreg)
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return -ENOMEM;
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memcpy(&vreg->cfg, &vreg_cfg[i], sizeof(vreg->cfg));
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ret = icnss_get_vreg_single(priv, vreg);
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if (ret != 0) {
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if (ret == -ENODEV)
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continue;
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else
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return ret;
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}
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list_add_tail(&vreg->list, vreg_list);
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}
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return 0;
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}
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void icnss_put_vreg(struct icnss_priv *priv)
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{
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struct list_head *vreg_list = &priv->vreg_list;
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struct icnss_vreg_info *vreg = NULL;
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while (!list_empty(vreg_list)) {
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vreg = list_first_entry(vreg_list,
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struct icnss_vreg_info, list);
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list_del(&vreg->list);
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}
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}
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static int icnss_vreg_on(struct icnss_priv *priv)
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{
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struct list_head *vreg_list = &priv->vreg_list;
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struct icnss_vreg_info *vreg = NULL;
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int ret = 0;
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list_for_each_entry(vreg, vreg_list, list) {
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if (IS_ERR_OR_NULL(vreg->reg) || !vreg->cfg.is_supported)
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continue;
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if (!priv->chain_reg_info_updated &&
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!strcmp(ICNSS_CHAIN1_REGULATOR, vreg->cfg.name)) {
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priv->chain_reg_info_updated = true;
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if (!priv->is_chain1_supported) {
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vreg->cfg.is_supported = false;
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continue;
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}
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}
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ret = icnss_vreg_on_single(vreg);
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if (ret)
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break;
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}
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if (!ret)
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return 0;
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list_for_each_entry_continue_reverse(vreg, vreg_list, list) {
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if (IS_ERR_OR_NULL(vreg->reg) || !vreg->enabled)
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continue;
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icnss_vreg_off_single(vreg);
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}
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return ret;
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}
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static int icnss_vreg_off(struct icnss_priv *priv)
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{
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struct list_head *vreg_list = &priv->vreg_list;
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struct icnss_vreg_info *vreg = NULL;
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list_for_each_entry_reverse(vreg, vreg_list, list) {
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if (IS_ERR_OR_NULL(vreg->reg))
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continue;
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icnss_vreg_off_single(vreg);
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}
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return 0;
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}
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int icnss_vreg_unvote(struct icnss_priv *priv)
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{
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struct list_head *vreg_list = &priv->vreg_list;
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struct icnss_vreg_info *vreg = NULL;
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list_for_each_entry_reverse(vreg, vreg_list, list) {
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if (IS_ERR_OR_NULL(vreg->reg))
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continue;
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if (vreg->cfg.need_unvote)
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icnss_vreg_unvote_single(vreg);
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}
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return 0;
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}
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int icnss_get_clk_single(struct icnss_priv *priv,
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struct icnss_clk_info *clk_info)
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{
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struct device *dev = &priv->pdev->dev;
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struct clk *clk;
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int ret;
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clk = devm_clk_get(dev, clk_info->cfg.name);
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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if (clk_info->cfg.required)
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icnss_pr_err("Failed to get clock %s, err = %d\n",
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clk_info->cfg.name, ret);
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else
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icnss_pr_dbg("Failed to get optional clock %s, err = %d\n",
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clk_info->cfg.name, ret);
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return ret;
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}
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clk_info->clk = clk;
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icnss_pr_dbg("Got clock: %s, freq: %u\n",
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clk_info->cfg.name, clk_info->cfg.freq);
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return 0;
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}
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static int icnss_clk_on_single(struct icnss_clk_info *clk_info)
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{
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int ret;
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if (clk_info->enabled) {
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icnss_pr_dbg("Clock %s is already enabled\n",
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clk_info->cfg.name);
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return 0;
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}
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icnss_pr_dbg("Clock %s is being enabled\n", clk_info->cfg.name);
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|
|
if (clk_info->cfg.freq) {
|
|
ret = clk_set_rate(clk_info->clk, clk_info->cfg.freq);
|
|
if (ret) {
|
|
icnss_pr_err("Failed to set frequency %u for clock %s, err = %d\n",
|
|
clk_info->cfg.freq, clk_info->cfg.name,
|
|
ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
ret = clk_prepare_enable(clk_info->clk);
|
|
if (ret) {
|
|
icnss_pr_err("Failed to enable clock %s, err = %d\n",
|
|
clk_info->cfg.name, ret);
|
|
return ret;
|
|
}
|
|
|
|
clk_info->enabled = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int icnss_clk_off_single(struct icnss_clk_info *clk_info)
|
|
{
|
|
if (!clk_info->enabled) {
|
|
icnss_pr_dbg("Clock %s is already disabled\n",
|
|
clk_info->cfg.name);
|
|
return 0;
|
|
}
|
|
|
|
icnss_pr_dbg("Clock %s is being disabled\n", clk_info->cfg.name);
|
|
|
|
clk_disable_unprepare(clk_info->clk);
|
|
clk_info->enabled = false;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int icnss_get_clk(struct icnss_priv *priv)
|
|
{
|
|
struct device *dev;
|
|
struct list_head *clk_list;
|
|
struct icnss_clk_info *clk_info;
|
|
struct icnss_clk_cfg *clk_cfg;
|
|
int ret, i;
|
|
u32 clk_list_size = 0;
|
|
|
|
if (!priv)
|
|
return -ENODEV;
|
|
|
|
dev = &priv->pdev->dev;
|
|
clk_list = &priv->clk_list;
|
|
|
|
if (priv->device_id == ADRASTEA_DEVICE_ID) {
|
|
clk_cfg = icnss_adrestea_clk_list;
|
|
clk_list_size = ICNSS_CLK_ADRESTEA_LIST_SIZE;
|
|
} else if (priv->device_id == WCN6750_DEVICE_ID ||
|
|
priv->device_id == WCN6450_DEVICE_ID) {
|
|
clk_cfg = icnss_clk_list;
|
|
clk_list_size = ICNSS_CLK_LIST_SIZE;
|
|
}
|
|
|
|
if (!list_empty(clk_list)) {
|
|
icnss_pr_dbg("Clocks have already been updated\n");
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < clk_list_size; i++) {
|
|
clk_info = devm_kzalloc(dev, sizeof(*clk_info), GFP_KERNEL);
|
|
if (!clk_info) {
|
|
ret = -ENOMEM;
|
|
goto cleanup;
|
|
}
|
|
|
|
memcpy(&clk_info->cfg, &clk_cfg[i],
|
|
sizeof(clk_info->cfg));
|
|
ret = icnss_get_clk_single(priv, clk_info);
|
|
if (ret != 0) {
|
|
if (clk_info->cfg.required)
|
|
goto cleanup;
|
|
else
|
|
continue;
|
|
}
|
|
list_add_tail(&clk_info->list, clk_list);
|
|
}
|
|
|
|
return 0;
|
|
|
|
cleanup:
|
|
while (!list_empty(clk_list)) {
|
|
clk_info = list_first_entry(clk_list, struct icnss_clk_info,
|
|
list);
|
|
list_del(&clk_info->list);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void icnss_put_clk(struct icnss_priv *priv)
|
|
{
|
|
struct device *dev;
|
|
struct list_head *clk_list;
|
|
struct icnss_clk_info *clk_info;
|
|
|
|
if (!priv)
|
|
return;
|
|
|
|
dev = &priv->pdev->dev;
|
|
clk_list = &priv->clk_list;
|
|
|
|
while (!list_empty(clk_list)) {
|
|
clk_info = list_first_entry(clk_list, struct icnss_clk_info,
|
|
list);
|
|
list_del(&clk_info->list);
|
|
}
|
|
}
|
|
|
|
static int icnss_clk_on(struct list_head *clk_list)
|
|
{
|
|
struct icnss_clk_info *clk_info;
|
|
int ret = 0;
|
|
|
|
list_for_each_entry(clk_info, clk_list, list) {
|
|
if (IS_ERR_OR_NULL(clk_info->clk))
|
|
continue;
|
|
ret = icnss_clk_on_single(clk_info);
|
|
if (ret)
|
|
break;
|
|
}
|
|
|
|
if (!ret)
|
|
return 0;
|
|
|
|
list_for_each_entry_continue_reverse(clk_info, clk_list, list) {
|
|
if (IS_ERR_OR_NULL(clk_info->clk))
|
|
continue;
|
|
|
|
icnss_clk_off_single(clk_info);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int icnss_clk_off(struct list_head *clk_list)
|
|
{
|
|
struct icnss_clk_info *clk_info;
|
|
|
|
list_for_each_entry_reverse(clk_info, clk_list, list) {
|
|
if (IS_ERR_OR_NULL(clk_info->clk))
|
|
continue;
|
|
|
|
icnss_clk_off_single(clk_info);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int icnss_hw_power_on(struct icnss_priv *priv)
|
|
{
|
|
int ret = 0;
|
|
|
|
icnss_pr_dbg("HW Power on: state: 0x%lx\n", priv->state);
|
|
|
|
spin_lock(&priv->on_off_lock);
|
|
if (test_bit(ICNSS_POWER_ON, &priv->state)) {
|
|
spin_unlock(&priv->on_off_lock);
|
|
return ret;
|
|
}
|
|
set_bit(ICNSS_POWER_ON, &priv->state);
|
|
spin_unlock(&priv->on_off_lock);
|
|
|
|
ret = icnss_vreg_on(priv);
|
|
if (ret) {
|
|
icnss_pr_err("Failed to turn on vreg, err = %d\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = icnss_clk_on(&priv->clk_list);
|
|
if (ret)
|
|
goto vreg_off;
|
|
|
|
return ret;
|
|
|
|
vreg_off:
|
|
icnss_vreg_off(priv);
|
|
out:
|
|
clear_bit(ICNSS_POWER_ON, &priv->state);
|
|
return ret;
|
|
}
|
|
|
|
int icnss_hw_power_off(struct icnss_priv *priv)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (test_bit(HW_ALWAYS_ON, &priv->ctrl_params.quirks))
|
|
return 0;
|
|
|
|
if (test_bit(ICNSS_FW_DOWN, &priv->state))
|
|
return 0;
|
|
|
|
icnss_pr_dbg("HW Power off: 0x%lx\n", priv->state);
|
|
|
|
spin_lock(&priv->on_off_lock);
|
|
if (!test_bit(ICNSS_POWER_ON, &priv->state)) {
|
|
spin_unlock(&priv->on_off_lock);
|
|
return ret;
|
|
}
|
|
clear_bit(ICNSS_POWER_ON, &priv->state);
|
|
spin_unlock(&priv->on_off_lock);
|
|
|
|
icnss_clk_off(&priv->clk_list);
|
|
|
|
ret = icnss_vreg_off(priv);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int icnss_power_on(struct device *dev)
|
|
{
|
|
struct icnss_priv *priv = dev_get_drvdata(dev);
|
|
|
|
if (!priv) {
|
|
icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
|
|
dev, priv);
|
|
return -EINVAL;
|
|
}
|
|
|
|
icnss_pr_dbg("Power On: 0x%lx\n", priv->state);
|
|
|
|
return icnss_hw_power_on(priv);
|
|
}
|
|
EXPORT_SYMBOL(icnss_power_on);
|
|
|
|
int icnss_power_off(struct device *dev)
|
|
{
|
|
struct icnss_priv *priv = dev_get_drvdata(dev);
|
|
|
|
if (!priv) {
|
|
icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
|
|
dev, priv);
|
|
return -EINVAL;
|
|
}
|
|
|
|
icnss_pr_dbg("Power Off: 0x%lx\n", priv->state);
|
|
|
|
return icnss_hw_power_off(priv);
|
|
}
|
|
EXPORT_SYMBOL(icnss_power_off);
|
|
|
|
void icnss_put_resources(struct icnss_priv *priv)
|
|
{
|
|
icnss_put_clk(priv);
|
|
icnss_put_vreg(priv);
|
|
}
|
|
|
|
|
|
#if IS_ENABLED(CONFIG_MSM_QMP)
|
|
/**
|
|
* icnss_aop_interface_init: Initialize AOP interface: either mbox channel or direct QMP
|
|
* @priv: Pointer to icnss platform data
|
|
*
|
|
* Device tree file should have either mbox or qmp configured, but not both.
|
|
* Based on device tree configuration setup mbox channel or QMP
|
|
*
|
|
* Return: 0 for success, otherwise error code
|
|
*/
|
|
int icnss_aop_interface_init(struct icnss_priv *priv)
|
|
{
|
|
struct mbox_client *mbox = &priv->mbox_client_data;
|
|
struct mbox_chan *chan;
|
|
int ret = 0;
|
|
|
|
ret = of_property_read_string(priv->pdev->dev.of_node,
|
|
"qcom,vreg_ol_cpr",
|
|
&priv->cpr_info.vreg_ol_cpr);
|
|
if (ret) {
|
|
icnss_pr_dbg("Vreg for OL CPR not configured\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
mbox->dev = &priv->pdev->dev;
|
|
mbox->tx_block = true;
|
|
mbox->tx_tout = ICNSS_MBOX_TIMEOUT_MS;
|
|
mbox->knows_txdone = false;
|
|
|
|
priv->mbox_chan = NULL;
|
|
priv->qmp = NULL;
|
|
priv->use_direct_qmp = false;
|
|
/* First try to get mbox channel, if it fails then try qmp_get
|
|
* In device tree file there should be either mboxes or qmp,
|
|
* cannot have both properties at the same time.
|
|
*/
|
|
chan = mbox_request_channel(mbox, 0);
|
|
if (IS_ERR(chan)) {
|
|
ret = PTR_ERR(chan);
|
|
icnss_pr_dbg("Failed to get mbox channel with err %d\n", ret);
|
|
priv->qmp = qmp_get(&priv->pdev->dev);
|
|
if (IS_ERR(priv->qmp)) {
|
|
icnss_pr_err("Failed to get qmp\n");
|
|
return PTR_ERR(priv->qmp);
|
|
} else {
|
|
priv->use_direct_qmp = true;
|
|
icnss_pr_dbg("QMP initialized\n");
|
|
}
|
|
} else {
|
|
priv->mbox_chan = chan;
|
|
icnss_pr_dbg("Mbox channel initialized\n");
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* cnss_aop_interface_deinit: Cleanup AOP interface
|
|
* @priv: Pointer to icnss platform data
|
|
*
|
|
* Cleanup mbox channel or QMP whichever was configured during initialization.
|
|
*
|
|
* Return: None
|
|
*/
|
|
void icnss_aop_interface_deinit(struct icnss_priv *priv)
|
|
{
|
|
if (!IS_ERR_OR_NULL(priv->mbox_chan))
|
|
mbox_free_channel(priv->mbox_chan);
|
|
|
|
if (!IS_ERR_OR_NULL(priv->qmp)) {
|
|
qmp_put(priv->qmp);
|
|
priv->use_direct_qmp = false;
|
|
}
|
|
}
|
|
|
|
static int icnss_aop_set_vreg_param(struct icnss_priv *priv,
|
|
const char *vreg_name,
|
|
enum icnss_vreg_param param,
|
|
enum icnss_tcs_seq seq, int val)
|
|
{
|
|
struct qmp_pkt pkt;
|
|
char mbox_msg[ICNSS_MBOX_MSG_MAX_LEN];
|
|
static const char * const vreg_param_str[] = {"v", "m", "e"};
|
|
static const char *const tcs_seq_str[] = {"upval", "dwnval", "enable"};
|
|
int ret = 0;
|
|
|
|
if (param > ICNSS_VREG_ENABLE || seq > ICNSS_TCS_ALL_SEQ || !vreg_name)
|
|
return -EINVAL;
|
|
|
|
snprintf(mbox_msg, ICNSS_MBOX_MSG_MAX_LEN,
|
|
"{class: wlan_pdc, res: %s.%s, %s: %d}", vreg_name,
|
|
vreg_param_str[param], tcs_seq_str[seq], val);
|
|
if (priv->use_direct_qmp) {
|
|
icnss_pr_dbg("Sending AOP QMP msg: %s\n", mbox_msg);
|
|
ret = qmp_send(priv->qmp, mbox_msg, ICNSS_MBOX_MSG_MAX_LEN);
|
|
if (ret < 0)
|
|
icnss_pr_err("Failed to send AOP QMP msg: %s\n", mbox_msg);
|
|
else
|
|
ret = 0;
|
|
} else {
|
|
icnss_pr_dbg("Sending AOP Mbox msg: %s\n", mbox_msg);
|
|
pkt.size = ICNSS_MBOX_MSG_MAX_LEN;
|
|
pkt.data = mbox_msg;
|
|
|
|
ret = mbox_send_message(priv->mbox_chan, &pkt);
|
|
if (ret < 0)
|
|
icnss_pr_err("Failed to send AOP mbox msg: %s,ret: %d\n",
|
|
mbox_msg, ret);
|
|
else
|
|
ret = 0;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#else
|
|
int icnss_aop_interface_init(struct icnss_priv *priv)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
void icnss_aop_interface_deinit(struct icnss_priv *priv)
|
|
{
|
|
}
|
|
|
|
static int icnss_aop_set_vreg_param(struct icnss_priv *priv,
|
|
const char *vreg_name,
|
|
enum icnss_vreg_param param,
|
|
enum icnss_tcs_seq seq, int val)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
int icnss_update_cpr_info(struct icnss_priv *priv)
|
|
{
|
|
struct icnss_cpr_info *cpr_info = &priv->cpr_info;
|
|
|
|
if (!cpr_info->vreg_ol_cpr || (!priv->mbox_chan && !priv->qmp)) {
|
|
icnss_pr_dbg("Mbox channel / QMP / OL CPR Vreg not configured\n");
|
|
return 0;
|
|
}
|
|
|
|
if (cpr_info->voltage == 0) {
|
|
icnss_pr_err("Voltage %dmV is not valid\n", cpr_info->voltage);
|
|
return -EINVAL;
|
|
}
|
|
|
|
cpr_info->voltage = cpr_info->voltage > BT_CXMX_VOLTAGE_MV ?
|
|
cpr_info->voltage : BT_CXMX_VOLTAGE_MV;
|
|
|
|
return icnss_aop_set_vreg_param(priv,
|
|
cpr_info->vreg_ol_cpr,
|
|
ICNSS_VREG_VOLTAGE,
|
|
ICNSS_TCS_UP_SEQ,
|
|
cpr_info->voltage);
|
|
}
|
|
|
|
static int icnss_get_battery_level(struct icnss_priv *priv)
|
|
{
|
|
int err = 0, battery_percentage = 0;
|
|
union power_supply_propval psp = {0,};
|
|
|
|
if (!priv->batt_psy)
|
|
priv->batt_psy = power_supply_get_by_name("battery");
|
|
|
|
if (priv->batt_psy) {
|
|
err = power_supply_get_property(priv->batt_psy,
|
|
POWER_SUPPLY_PROP_CAPACITY,
|
|
&psp);
|
|
if (err) {
|
|
icnss_pr_err("battery percentage read error:%d\n", err);
|
|
goto out;
|
|
}
|
|
battery_percentage = psp.intval;
|
|
}
|
|
|
|
icnss_pr_info("Battery Percentage: %d\n", battery_percentage);
|
|
out:
|
|
return battery_percentage;
|
|
}
|
|
|
|
static void icnss_update_soc_level(struct work_struct *work)
|
|
{
|
|
int battery_percentage = 0, current_updated_voltage = 0, err = 0;
|
|
int level_count;
|
|
struct icnss_priv *priv = container_of(work, struct icnss_priv, soc_update_work);
|
|
|
|
battery_percentage = icnss_get_battery_level(priv);
|
|
if (!battery_percentage ||
|
|
battery_percentage > ICNSS_MAX_BATTERY_LEVEL) {
|
|
icnss_pr_err("Battery percentage read failure\n");
|
|
return;
|
|
}
|
|
|
|
for (level_count = 0; level_count < ICNSS_BATTERY_LEVEL_COUNT;
|
|
level_count++) {
|
|
if (battery_percentage >=
|
|
icnss_battery_level[level_count].lower_battery_threshold) {
|
|
current_updated_voltage =
|
|
icnss_battery_level[level_count].ldo_voltage;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (level_count != ICNSS_BATTERY_LEVEL_COUNT &&
|
|
priv->last_updated_voltage != current_updated_voltage) {
|
|
err = icnss_send_vbatt_update(priv, current_updated_voltage);
|
|
if (err < 0) {
|
|
icnss_pr_err("Unable to update ldo voltage");
|
|
return;
|
|
}
|
|
priv->last_updated_voltage = current_updated_voltage;
|
|
}
|
|
}
|
|
|
|
static int icnss_battery_supply_callback(struct notifier_block *nb,
|
|
unsigned long event, void *data)
|
|
{
|
|
struct power_supply *psy = data;
|
|
struct icnss_priv *priv = container_of(nb, struct icnss_priv,
|
|
psf_nb);
|
|
if (strcmp(psy->desc->name, "battery"))
|
|
return NOTIFY_OK;
|
|
|
|
if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state) &&
|
|
!test_bit(ICNSS_FW_DOWN, &priv->state))
|
|
queue_work(priv->soc_update_wq, &priv->soc_update_work);
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
int icnss_get_psf_info(struct icnss_priv *priv)
|
|
{
|
|
int ret = 0;
|
|
|
|
priv->soc_update_wq = alloc_workqueue("icnss_soc_update",
|
|
WQ_UNBOUND, 1);
|
|
if (!priv->soc_update_wq) {
|
|
icnss_pr_err("Workqueue creation failed for soc update\n");
|
|
ret = -EFAULT;
|
|
goto out;
|
|
}
|
|
|
|
priv->psf_nb.notifier_call = icnss_battery_supply_callback;
|
|
ret = power_supply_reg_notifier(&priv->psf_nb);
|
|
if (ret < 0) {
|
|
icnss_pr_err("Power supply framework registration err: %d\n",
|
|
ret);
|
|
goto err_psf_registration;
|
|
}
|
|
|
|
INIT_WORK(&priv->soc_update_work, icnss_update_soc_level);
|
|
|
|
return 0;
|
|
|
|
err_psf_registration:
|
|
destroy_workqueue(priv->soc_update_wq);
|
|
out:
|
|
return ret;
|
|
}
|