Yujun Zhang 86162602c5 disp: msm: dsi: Fix incorrect DSI PHY timing of version 4 ...

For DSI PHY timing of version 4, adds the missing configuation
of phy_clk_params and updates some extra clock parameters.
The less precision during calculation is fixed, which is caused by
not exactly following PHY timing document.

Change-Id: Ibb75d4d3e5b4a5979ff4a85dba1accf3677a6584
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>

2019-06-11 20:00:48 -07:00

config

makefile: add LITO config support for display techpack

2019-05-07 23:35:59 -07:00

msm

disp: msm: dsi: Fix incorrect DSI PHY timing of version 4

2019-06-11 20:00:48 -07:00

pll

Merge "disp: pll: update SSC offset value"

2019-05-21 07:34:58 -07:00

rotator

disp: correct secure id to hold vaddr

2019-05-28 10:46:31 -07:00

Makefile

makefile: add LITO config support for display techpack

2019-05-07 23:35:59 -07:00

NOTICE

Display drivers kernel project initial snapshot

2019-04-14 22:20:59 -07:00

Description

No description provided

184 MiB

Languages

C 98.7%

C++ 0.9%

Makefile 0.3%

Starlark 0.1%