7bbd2390ff2c449bdba8ad8eaddea9bd252fbe2b

It is possible for UMD to send synx handles directly to FW for input or output. FW will signal these fences to CPU. On such occasions, ICP HLOS driver can skip processing input and output synx fences. Synx will signal CSL. CRs-Fixed: 3351015 Change-Id: Ia2c36db3bdaf75e12e27484357350fb20f32fcbc Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
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