Prasad Kumpatla 7769502c7d asoc: msm_common: add counter to reset vote at the time of SSR ...

When target enters into secure mode, HLOS receives an event to
place vote against sleep until writing of required registers
from TZ. Once the secure DMA registers write done, HLOS will
get a event to unvote against sleep.

Issue scenario: When device enter secure mode votes for sleep
against, before unvote event receives for TZ SSR is triggered.
When SSR triggers all votes are reset on ADSP. While recovering
from SSR, HLOS receives unvote event to HLOS, which will unvoting
of other use case vote and leading to NOC issue.

Solution: Maintain a counter for sleep against vote to
track the votes and unvotes. Also reset the sleep counter
if SSR is trigger as ADSP will reset all votes on SSR.

Change-Id: Ib1689d8f54408a9a80a12fb2697ba5c3d7087b9a
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>

2023-03-15 02:34:43 -07:00

34 KiB

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